Intel mcs-48 manual Output Loading Test Circuits

Models: mcs-48

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8293

OUTPUT LOADING TEST CIRCUITS

TO SCOPE

(OUTPUT) +2.3V

38.311

BUS

CL INCLUDES JIG AND PROBE CAPACITANCE

Figure 11. Data Input to BUI Output (Driver)

TO SCOPE

1.W

(OUTPUT)

 

13.52

BUS

. / (I.LZI. I.ZL1)

 

1l·HZ1

o --.......--~:r

.I.ZHIl

4802

CL INCLUDEI JIG AND PROBE CAPACITANCE

TO SCOPE

(OUTPUT) +5.0V

24011

DATA

1"1

~z INlll ~~ OREQUIV.

;~

-F-

CL INCLUDEI JIG AND PROBE CAPACITANCE

Figure 12. BUI Input to Data Output (Receiver)

TO SCOPE

(OUTPUT) 5.oV

DATA

. / (I.LZI. I..u)

o--t----

<y

CL INCLUDEI JIG AND PROBE CAPACITANCE

Figure 13. SendlRecelve Input to BUI Output (Driver)

Figure 14. SendlRecelve Input to Data Output (Receiver)

9-119

Page 434
Image 434
Intel mcs-48 manual Output Loading Test Circuits