Intel mcs-48 manual Vol Voh, Tivov, Tshov, Tehoz, Telov, Tivsl, Tslix, Tshsl

Models: mcs-48

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ABSOLUTE MAXIMUM RATINGS·

Temperature Under Bias

O·Cto 70·C

Storage Temperature .••..

-65·Cto + 150·C

All Output and Supply Voltages

- 0.5V to + 7V

All Input Voltages

- 1.0V to + 5.5V

Power Dissipation

1 Watt

'NOTICE: Stresses above those listed under"AbsoluteMaxlmum Ratings" may cause permanent damage to the device. This is astress rating only and

functional operation of the device at these or any other conditions above

those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

D.C. CHARACTERISTICS

Conditions: Vee Symbol

Vc

Icc

IF

IR

VOL

VOH

10FF

VIL

VIH CIN

=5V ± 10%, TA = ooe to 700 e

Parameter

Min

Max

Units

Test Conditions

Input Clamp Voltage

 

-1

V

Ic =

-5 rnA

 

Power Supply Current

 

160

rnA

 

 

 

Forward Input Current

 

-0.2

rnA

VF =

0.45V

 

Reverse Input Current

 

50

,..A

VR =

5.25V

 

Output Low Voltage

 

.45

V

10L =

32 rnA

 

Output High Voltage

2.4

 

V

10H =

-5 rnA

Output Off Current

 

± 50

,..A

VOFF = 0.45 to 5.25V

Input Low Voltage

 

0.8

V

.Vcc= 5.0V

See Note 1

Input High Voltage

2.0

 

V

Vcc=5.0V

See Note 1

 

 

 

 

F= 1 MHz

 

Input Capacitance

 

12

pF

VBIAS = 2.5V, Vcc= 5V

 

 

 

 

TA =25·C

 

NOTE: 1. Output Loading IOL=32mA,loH =-5mA, CL=300pF.

A.C. CHARACTERISTICS

Conditions: Vee = 5V ± 10%, TA = ooe to 700 e

 

 

 

Loading: Outputs -

10L = 32 rnA, IOH = -

5 rnA, CL =

300 pF

 

 

Symbol

Parameter

Min

Max

Units

Test Conditions

TIVOV

Input to Output Delay

 

22

 

(See Note 1)

 

-Inverting

5

ns

 

 

-Non-Inverting

5

30

ns

 

TSHOV

STB to Output Delay

 

 

 

 

 

-Inverting

10

40

ns

 

 

- Non·lnverting

10

45

ns

 

TEHOZ

Output Disable Time

5

18

ns

 

TELOV

Output Enable Time

10

30

ns

 

TIVSL

Input to STB Setup Time

0

 

ns

 

TSLIX

Input to STB Hold Time

25

 

ns

 

TSHSL

STB High Time

15

 

ns

 

NOTE: 1. See waveforms and test load circuit on following page.

 

 

 

 

 

8-45

 

AFN 00727B

Page 306
Image 306
Intel mcs-48 manual Vol Voh, Tivov, Tshov, Tehoz, Telov, Tivsl, Tslix, Tshsl