SINGLE COMPONENT SYSTEM

IA" IA,O IAg IAs IA7 IA61 A51 A41 Aal A21 A, IAO I

,

i

!

Conventional Program Counter

Counts OOOH to 7FFH

Overflows 7FFH to OOOH

PROGRAM COUNTER

2.1.7 Program Status Word

An 8-bit status word which can be loaded to and from the accumulator exists called the Program Status Word (PSW). The accom- panying figure shows the information available in the word. The Program Status Word is actually a collection of flip-flops throughout the machine which can be read or written as a whole. The ability to write to PSW allows for easy restoration of machine status after a power down sequence.

SAVED IN STACK

STACK POINTER

I

I

ICY IAC I FO I BS I 1

MSB

LSB

CY

CARRY

AC

AUXILLARY CARRY

FO

FLAG 0

BS

REGISTER BANK SELECT

PROGRAM STATUS WORD (PSW)

POINTER

·

 

111

R23

22

 

·

110

21

20

 

·

 

19

101

·

18

100

·

17

16

 

 

·

15

011

I

 

 

14

 

 

·

13

010

12

 

The upper four bits of PSW are stored in the Program Counter Stack with every call to subroutine or interrupt vector and are optionally restored upon return with the RETR instruction. The RET return instruction does not update PSw.

The PSW bit definitions are as follows:

Bits a - 2: Stack Pointer bits (So, s" S2)

Bit 3: Not used ("1" level when read)

Bit 4: Working Register Bank Switch

Bit (BS)

a = Bank a

1 = Bank 1

Bit 5: Flag a bit (Fa) user controlled flag which can be comple- mented or cleared, and tested with the conditional jump in- struction JFa.

Bit 6: Auxiliary Carry (AC) carry bit generated by an ADD instruc- tion and used by the decimal adjust instruction DA A.

Bit 7: Carry (CY) carry flag which indicates that the previous operation has resulted in over- flow of the accumulator.

001

:

11

10

 

PSW

pcs _"

9

000

PCo;J

R8

PC4-7

MSB

 

LSB

PROGRAM COUNTER STACK

2.1.8 Conditional Branch Logic

The conditional branch logic within the pro- cessor enables several conditions internal and external to the processor to be tested by the users program. By using the conditional jump instruction the following conditions can effect a change in the sequence of the program execution.

2-6

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Image 33
Intel mcs-48 manual R23, Pointer