Intel mcs-48 manual 8291, System Diagram, General Purpose Interface BUS Gpib, General Description

8291

8291 SYSTEM DIAGRAM

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THE GENERAL PURPOSE INTERFACE

BUS (GPIB)

The General Purpose Interface Bus (GPIB) is defined in			r r r r r
the IEEE Standard 488-1978 "Digital Interface for	DEVICE A
Programmable Instrumentation." Although a knowledge	ABLE TO	I	t-
of this standard is assumed, Figure 1 provides the bus	TALK, LISTEN,
	AND
structure for quick reference. Also, Tables 1 and 2	CONTROL
reference the interface state mnemonics and the interface	(e.g. calculator)
messages respectively. Modified state diagrams for the
8291 are presented in Appendix A.	DEVICE B
GENERAL DESCRIPTION	ABLE TO	I	r--
	TALK AND
	LISTEN

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DATA BUS

The 8291 is a microprocessor controlled device de- signed to interface microprocessors e.g., 8048, 8080, 8085,8086 to the GPIB. It implements all of the interface functions defined in the IEEE 488 Standard. If an imple- mentation of the Standard's Controller function is desired, it can be connected with an Intel® 8292 to form a complete interface.

The 8291 handles communication between a microproc- essor controlled device and the GPIB. Its capabilities in- clude data transfer, handshake protOCOl, talkerllistener addressing procedures, device clearing and triggering, service request, and both serial and parallel polling schemes. In most procedures, it does not disturb the microprocessor unless a byte is waiting on input or a byte sent on output (output buffer empty).

The 8291 architecture includes 16 registers. Eight of these registers may be written into by the microprocessor. The other eight registers may be read by the microprocessor. One each of these read and write registers is for direct data transfers. The rest of the write registers control the various features of the chip, while the rest of the read registers provide the microprocessor with a monitor of GPIB states, various bus conditions, and device conditions.

(e.g. digital

multimeterl

DEVICE C

ONLY ABLE

TO LISTEN

(e.g. signal

generator)

DEVICE 0

ONLY ABLE

TO TALK

(e.g. counter)

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I

t-

(

t-

DATA BYTE

TRANSFER

(I-t--CONTROL

GENERAL

INTERFACE

MANAGEMENT

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DAV

NRFD

NDAC

IFC

ATN

SRO

REN

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Figure 1_ Interface Capabilities and Bus Structure_

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