Intel mcs-48 manual Icy

inter8272

A.C. CHARACTERISTICS

tA= O'Cto 70'C,Vcc= +5.0V± 5%

SYMBOLPARAMETER

MIN MAX UNIT TEST CONDITIONS

ICY tCH tRST

Read Cycle tAR

tRA tRR tRO tOF

Write Cycle tAW tWA tww tow two

Interrupt.

tRI tWI

DMA tRQCY tAKRQ tRQR tRQW tRQRW

FDD Interlace tWCY

tWCH tcp tco twoo tWE

tWWCY

Clock Period

Clock High Period

Reset Width

Select Setup to AD!

Select Hold from RD!

AD Pulse Width

Data Delay from RD!

Output Float Delay

Select Setup to WR!

Select Hold from WJ!!! iiiiFi Pulse Width

Data Setup to WR! Data Hold from WJ!!!

INT Delay from RD!

INT Delay from WR!

ORO Cycle Period i5ACK! to ORO! ORO! to RD! ORO! toWR!

ORO! to RD! or WR!

	TYp1
WCK Cycle Time	20r4
	r- 1..£r2_
WCK HlghTlme	250
Pre-Shift Delay from WCK!
WDA Delay from WCK!
Write Data Width
WE! to WCK! or WE! to WCK! Delay	1 ---
Window Cycle Time
	2

125		ns
40		ns
14		ICY
0		ns
0		ns
250		ns
	200	ns	CL = 100 pF
20	100	ns	CL = 100 pF
0		ns
0		ns
250		ns
150		ns
5		ns
	500	ns
	500	ns
13		~s
	200	ns
800		ns	8 MHz clock
250		ns	8 MHz clock
	12	~s	8 MHz clock
---	--- - MFM=O ---
		~s	Note 2
- 80 --	35'0	- -	_MFM':..!..___
		ns
20	100	ns
20	100	ns
tWCH-50		ns	------
20	IUU	ns
----
		~s	MFM=O
			___

tWRO tROW tROD

FDD

SeEKI

DIRECTIONI STEP

tus Isu tso tos tOST tSTO tSTU tSTP tsc tFR tlOX tTC

I-.....!-

Window Setup to ROD!

Window Hold from ROD!

ROD Active Time (HIGH)

USO,1 Setup to RW/SEEK!
~,1 Hold from RW/SEEK!
RW/SEEK Setup to LCTIDIR
RW/SEEK Hold from LCT/DIR
LCT/DIR Setup to FRISTEP!
LCT/DIR Hold from FA/STEP!
DSO,1 Hold from FA/Step!
STEP Active Time (H igh)	5
STEP Cycle Time
FAULT RESET Active Time (High)
INDEX Pulse Width	625
Terminal Count Width

----	--	--~B!1=..1
15		ns
15		ns
40		ns

12~s

15~s

7~s

30~s

1~s

24 ~s 8MHz clock

5~s

		~s
33		~s	Note 3
8	10	~s
		~s
1		tCY

NOTES:

1.Typical values for TA = 25'Cand nominal supply voltage.

2.The former values are used for standard floppy and the lalter values are used for mini-floppies.

3.tsc= 33~s min. Is for different drive units. In the case of same unit, tsc can be ranged from 1 ms to 16ms with 8MHzclock period, and 2ms to 32ms with 4 MHz clock, under software control.

9-64