Intel mcs-48 Basic Schematic Symbols, II. Gated Butter 3-State, Gated Buffer, DS2 , ------,----.J

Models: mcs-48

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8212

Applications of the 8212 ..... For

Microcomputer Systems

IBasic Schematic Symbol

II Gated Buffer

III BI-Directlonal Bus Driver IV Interrupting Input Port

1. Basic Schematic Symbols

Two examples of ways to draw the 8212 on system schematics - (1) the top being, the detailed view showing pin numbers, and (2) the bottom being the symbolicview

BASIC SCHEMATIC SYMBOLS

INPUT DEVICE

11

STB 4

01 DO

6

V Interrupt Instruction Port

VI Output Port'

VII '8080A,$,tatusLatch

VIII 8085A'-AddressLatch

showing the system input or output as a system bus (bus containing 8 parallel lines). The output to the data bus is symbolic In referencing 8 parallel lines.

OUTPUT DEVICE

11

~01 STB DO :

 

 

8

 

9

 

10

 

16

8212

15

(DETAILED)

 

 

1817

19

GND

 

 

Vee

INPUT

 

_..c:::;~-- OUTPUT,

 

..

FLAG

STROBE----;:=L...,

 

SYSTEM

(SYMBOLIC)

 

SYSTEM

INPUT

 

 

OUTPUT

GND

DATA BUS

II. Gated Butter (3-State)

The simplest use of the 82121s that of a gated butter. By tying the mode signal low and the strobe input high, the data latch is acting as a straight through gate. The output buffers are then enabled from the device selection logic

DS1 and DS2.'

When the device selection logic is false, the outputs are 3-

state.'

When the device selection logic is true, the input data from the system is directly transferred to the output. The input data load Is 250 micro amps. The output data can sink 15 milll amps. The minimum high output is ,3.65 volts.

GATED BUFFER

vcc--~-----.---~

 

STB

 

INPUT

 

OUTPUT

DATA,

8212

DATA

(250.AI

 

(15mA)

(3.65V MIN)

~----<ilCLIf

GATING {

CONTROL

(m.DS2) , __-:-_----,-_---.J

8-26

AFN.(JQ731 A-OG

Page 287
Image 287
Intel mcs-48 manual Basic Schematic Symbols, II. Gated Butter 3-State, Gated Buffer, DS2 , ------,----.J