8021

INSTRUCTION SET SUMMARY

 

Mnemonic

Description

Bytes

Cycle

 

Mnemonic

 

ADD

A,R

Add register to A

 

1

 

JMP

addr

 

ADD

A,@R

Add data memory to A

 

1

 

JMPP

@A

 

ADD

A.#data

Add immediate to A

 

2

 

DJNZ

R,addr

 

ADDC

A,R

Add with carry

 

1

.<:

JC

addr

 

ADDC

A,@R

Add with carry

 

1

 

 

u

JNC

addr

 

ADDC

A,#data

Add with carry

2

2

c

 

E

JZ

addr

 

ANL

A,R

And register to A

1

1

 

'"

JNZ

addr

 

ANL

A,@R

And data memory to A

1

 

 

ANL

A, #data

And immediate to A

2

 

 

JT1

addr

 

 

 

JNT1

addr

 

ORL

A,R

Or register to A

1

 

 

 

 

 

JTF

addr

 

ORL

A,@R

Or data memory to A

1

1

~

:;~

.g

 

 

ORL

A,#data

Or immediate to A

 

2

 

 

 

~

 

 

E

XRL

A,R

Exclusive Or register to A

 

 

e

CALL

addr

~

XRL

A,@R

Exclusive or data memory to A

 

 

.c

RET

 

u

 

 

~

 

 

u

XRL

A,#dat8

Exclusive or immediate to A

 

 

en

 

 

«

 

 

 

CLR

C

INC

A

Increment A

 

 

ri'

 

 

 

CPL

C

 

DEC

A

Decrement A

 

 

 

 

 

ii:

 

 

 

CLR

A

Clear A

 

 

 

 

 

 

 

 

MOV

A,R

 

CPL

A

Complement A

 

 

 

 

 

 

 

MOV

A,@R

 

DA

A

Decimal Adjust A

 

 

 

 

 

 

 

MOV

A,#data

 

SWAP

A

Swap nibbles of A

 

 

 

 

 

 

 

MOV

R,A

 

RL

A

Rotate A left

 

 

~

 

 

 

>

MOV

@R,A

 

RLC

A

Rotate A left through carry

 

 

0

 

 

 

:;

MOV

R,#data

 

RR

A

Rotate A right

 

 

!!

 

 

 

MOV

@R,#data

 

RRC

A

Rotate A right through carry

 

 

 

 

 

0

XCH

A,R

 

 

 

 

 

 

 

IN

A,P

I nput port to A

 

 

 

XCH

A,@R

',;

 

 

 

XCHD

A,@R

.'l-

OUTL

P,A

Output A to port

 

 

 

MOVP

A,@A

~

 

 

 

 

 

 

 

 

..,

MOVD

A,P

Input Expander port to A

 

2

 

 

 

0

MOVD

P,A

Output A to Expander port

 

2

~

MOV

A,T

~

 

c

Co

ANLD

P,A

And A to Expander port

 

2

~

MOV

T,A

!;

ORLD

P,A

Or A to Expander port

 

2

0

STRT

T

~

 

~

 

 

 

 

 

~

STRT

CNT

~

INC

R

Increment register

 

 

E

STOP

TCNT

 

 

;:

....

INC

@R

Increment data memory

 

 

 

 

 

~

 

 

 

 

 

 

NOP

 

a:

 

 

 

 

 

 

 

Description

Bytes

Cycle

Jump unconditional

2

2

Jump indirect

1

2

Decrement register and Jump

2

2

on R not zero

 

 

Jump on Carry = 1

2

2

Jump on Carry"" a

2

2

Jump on A Zero

2

2

Jump on A not Zero

2

2

Jump on Tl '" 1

2

2

Jump on Tl =- 0

2

2

Jump on timer flag

2

2

Jump to subroutine

2

2

Return

1

2

Clear Carry

 

 

Complement Carry

 

 

Move register to A

 

 

Move data memory to A

 

 

Move immediate to A

 

2

Move A to register

 

1

Move A to data memory

 

1

Move immediate to register

 

2

Move immediate to data memory

2

Exchange A and register

 

,

Exchange A and data memory

 

2

Exchange nibble of A and register 1

1

Move to A from cu rrent page

1

2

Read Timer/Counter

Load Timer/Counter

Start Timer

Start Counter

Stop Timer/Counter

No Operation

Instruction Set - The following instructions, which are found in the 8748, have been deleted from the 8021 instruction set.

Data Moves

Registers

Branch

Timer

Control

Input/Output

MOV

A,PSW

DEC

R

JTO

addr

EN

TCNTI

EN

I

ANL

P,#data

MOV

PSW,A I ---JNTO

addr

DIS

TCNTI

DIS

I

ORL

P,#data

MOVX

A,@R

Flags

JFO

addr

 

 

SEL

RBO

INS

A,BUS *

MOVX

@R,A

~ JFl

addr Subroutine

SEL

RBl OUTl

BUS,A *

MOVP3

A,@A

CPl

FO

JNI

addr

RETR

SEL

MBa

ANL

BUS,#data

 

 

JBb

addr

SEL

MBl

ORL

BUS,#data

 

 

CLR

Fl

 

 

 

 

 

 

 

 

ENTO ClK

 

 

 

 

CPL

Fl

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

"These Instructions have been replaced in the 8021 by

IN A,PO and OUTL PO,A respectively.

4-6

Page 79
Image 79
Intel mcs-48 manual 8021