Intel mcs-48 manual Jump Conditions, +--1 R

SINGLE COMPONENT SYSTEM

	Jump Conditions
Device Testable	(Jump On)
		not all
Accumulator	All zeros	zeros
Accumulator Bit	°	1
Carry Flag		1
User Flags (FO, F1)		1
Timer Overflow Flag	°	1
Test Inputs (TO, T1)		1
.Interrupt Input (INT)
	°

2.1.9 Interrupt

An interrupt sequence is initiated by applying a low "0" level input to the INT pin. Interrupt is level triggered and active low to allow "WIRE DRing" of several interrupt sources at the input pin. The Interrupt line is sampled every machine cycle during ALE and when detected causes a "jump to subroutine" at location 3 in program memory as soon as all cycles of the current instruction are complete. INT must be held low for at least TCy to ensure proper

		CONDITIONAL
		JUMP LOGIC
		TIMER	INTERRUPT
JTF		FLAG
			CALL
EX ECUTEO--.:r--.
			EXECUTED
RESET	>--+--1 R
		r ------- I D	CLR	EXTERNAL
			Q	INTERRUPT
				RECOGNIZED
	S	Q
		TIMER		TIMER
		OVERFLOW	Q
TIMER INT ___	....- .	FF		INTERRUPT
				RECOGNIZED
RECOGNIZED	R
EXECUTED

		S
		INTERRUPT
		IN
		PROGRESS
	Q	FF
	TIMER	R
	INT
	ENABLE
R	Q

mT~______~ 0

PIN

INT

FF

Q

	CLK
ALE--- I- '"
LAST CYCLE	} -____....l
OF INST.
EN I	S	Q

EXECUTED

INT

ENABLE

DISI

EXECUTEDR RESET---:&..._

RESET

RETR

EXECUTED

NOTE:

1.INT INPUT IS SAMPLED BY ALE EVERY MACHINE CYCLE EXCEPT FIRST CYCLE OF DOUBLE CYCLE INSTRUCTION.

2.WHEN INTERRUPT IN PROGRESSf/f ISSET ALL FURTHER INTERRUPTS ARE LOCKED OUT INDEPENDENT OF STATE OF EITHER INTERRUPT ENABLE f/f.

3.WHILE TIMER INTERRUPTS ARE DISABLED TIMER OVERFLOW f/f WILL NOT STORE ANY OVERFLOW THAT OCCURS. TIMER FLAG WILL BE SET, HOWEVER.

INTERRUPT LOGIC

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