Multiprocessor Operation/Coordinators

6.1Introduction

The S5-135U/155U is a member of the SIMATIC S5 family of programmable (logic) controllers. The PLC can be used both in single and in multiprocessor operation with up to four CPUs.

Slots Occupied You can arbitrarily combine the CPUs in the central controller at the CPU slots.

CPU

CPU 948/CPU 928B/CPU 928

CPU 922

Slot Requirement

2slots 1 slot

In multiprocessor operation, each CPU processes its individual user program independently of the other CPUs.

The common S5 bus serves for data interchange with I/O modules, CPs, IPs and other CPUs. In multiprocessor operation, access of the CPUs to the S5 bus is controlled by a coordinator. The functioning of this module is described in Sections 6.5 and 6.6.

For an explanation of data interchange between CPUs in multiprocessor operation and the arrangement of your STEP 5 program, please consult the Programming Guide for your CPU.

Coordinator

A coordinator is required in multiprocessor operation. The following are

 

available for the S5-135U/155U PLC:

 

S 923A coordinator (COR A)

 

and

 

S 923C coordinator (COR C).

 

The coordinator allocates to the CPUs the time divisions in which they can

 

access the S5 bus (bus enable time), and contains the global memory for data

 

interchange between the CPUs via communication flags. Additionally, the

 

COR C contains another memory with four pages for the ªmultiprocessor

 

communicationº function as well as a serial PG interface with PG

 

multiplexer function (PG MUX).

6-2

System Manual

C79000-G8576-C199-06

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Image 264
Siemens S5-135U/155U appendix Introduction, Coordinator