Siemens S5-135U/155U Addressing method for the page memory vector register, PG Multiplexer

Multiprocessor Operation/Coordinators

The semaphores are used to coordinate the CPUs for access to the same I/O address (see Programming Guides, operations SES and SEF).

F200H

CommunicationFlags

F300H

Synchronization Area for Operating Systems

F400H

Page Memory for

Data Blocks

	F7FFH
Vector Register for
Page Selection,	FEFFH
Fault Register

Page No. 252

Page No. 253

Page No. 254

Page No. 255

Figure 6-8 Areas of the Communication Memory on the S5 Bus

	Addressing method for the page memory (vector register)
	The vector register serves to form subaddresses of several memories in a
	common address area. The register is an 8-bit register which is written to
	under address FEFFH. It cannot be read out.
	The page memory contains four pages of 1 Kbyte. An identification number
	is assigned to each page. These are the numbers 252, 253, 254 and 255.
	These numbers are permanently set on the COR 923C and cannot be
	changed. You must not use these numbers on other modules (CP, IP) in the
	same PLC otherwise double addressing will occur.
	When the supply voltage is switched on, the vector register is cleared. The
	vector register then has the number 0H.
	The transfer of data to and from this memory is implemented with special
	functions of the CPU. You can find these functions in the appropriate
	Programming Guides.
PG Multiplexer	The PG interface of the COR 923C can be switched over to eight different
	serial interfaces via the path selection of the PG software.
	The multiplex interfaces have TTL level and are wired to the other modules
	via the backplane connector and backplane.

System Manual	6-21
C79000-G8576-C199-06