Intel 820E manual 135

Intel® 820E Chipset

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Table 45. USB	134
Table 46. LAN Connect I/F	135
Table 47. AC’97	136
Table 48. ICH2 Decoupling	136
Table 49. CK-SKS Clocking	137
Table 50. RTC	137
Table 51. AGTL+ Parameters for Example Calculations1,2	143
Table 52. Example TFLT_MAX Calculations for 133 MHz Bus1	144
Table 53. Example TFLT_MIN Calculations1 (Frequency Independent)	145
Table 54. Trace Width Space Guidelines	148
Table 55. Intel® 820E Chipset Platform System Clocks	163
Table 56. Intel® 820E Chipset Platform Clock Skews	165
Table 57. Intel® 820E Chipset Platform System Clock Cross-Reference	167
Table 58. Placement Guidelines for Motherboard Routing Lengths (Direct RDRAM*
Clock Routing Length Guidelines)	170
Table 59. External DRCG Component Values	172
Table 60. Unused Output Termination	174
Table 61. 28 Ω Stack-Up Examples	179
Table 62. 3D Field Solver vs. ZCALC	180
Table 63. Intel® 820E Chipset Component Thermal Design Power	193
Table 64. Glue Chip Vendors	194

Design Guide 11