Intel 820E Integrated LAN Controller, Ultra ATA/100 Support, Expanded USB Support, Manageability

Intel® 820E Chipset

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1.4.5.Integrated LAN Controller

The ICH2 component incorporates an integrated LAN Controller. Its bus master capabilities enable the component to process high-level commands and perform multiple operations, which lowers processor utilization by off-loading communication tasks from the processor.

The ICH2 functions with several options of LAN connect components, allowing the targeting of the desired market segment. The Intel® 82562EH component provides a HomePNA 1-Mbit/sec connection. The Intel® 82562ET component provides a basic Ethernet* 10/100 connection. The Intel® 82562EM component provides an Ethernet 10/100 connection with the added flexibility of Alert on LAN. More advanced LAN solutions can be implemented with the Intel® 82550 or other PCI-based product offerings.

1.4.6.Ultra ATA/100 Support

The ICH2 (82801BA) component supports the IDE controller with two sets of interface signals (primary and secondary) that can be enabled independently, tri-stated or driven low. The component supports UltraATA/100, Ultra ATA/66, UltraATA/33, and multiword p modes for transfers of up to

100Mbytes/sec.

1.4.7.Expanded USB Support

The ICH2 component contains two USB host controllers. Each host controller includes a root hub with two separate USB ports each, for a total of four USB ports. The addition of a USB host controller expands the functionality of the platform.

1.4.8.Manageability

The Intel 820E chipset platform integrates several functions designed to manage the system and lower the system’s total cost of ownership (TCO). These system management functions are designed to report errors, diagnose the system, and recover from system lock-ups, without the aid of an external microcontroller.

TCO Timer

The ICH2 integrates a programmable TCO timer, which is used to detect system locks. The first expiration of the timer generates an SMI#, which the system can use to recover from a software lock. The second expiration of the timer causes a system reset, to recover from a hardware lock.

Processor Present Indicator

The ICH2 looks for the processor to fetch the first instruction after reset. If the processor does not fetch the first instruction, the ICH2 will reboot the system at the safe-mode frequency multiplier.

ECC Error Reporting

After detecting an ECC error, the MCH can send one of several messages to the ICH2. The MCH can instruct the ICH2 to generate either an SMI#, NMI#, SERR# or TCO interrupt.

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