Intel 820E AD0, AD1, AD2, AD3, AD5, AD7, AD8, AD9, Pwrok, Vrmpwrgd, Pwrgood, SLPS3#, SLPS5#, Par

8

ICH 2

D

7,9,34,36

4,9,33,36

9,34,36

4,8,36

9,35

6,8,10,11,12,24,25,26,27

9,36

4,6,37

C

B

VCC1_8

1%

330

R10

A

			7	6
	AD[31:0]
	25,26			AD0
				AD1
				AD2
				AD3
				AD4
				AD5
	Test header. For debug only.			AD6
				AD7
			J17	AD8
				AD9
	PWROK	1	2
				AD10
	VRM_PWRGD	3	4
				AD11
	PWRGOOD	5	6
				AD12
	SLP_S3#	7	8
				AD13
	SLP_S5#	9	10
				AD14
	PCIRST#	11	12
				AD15
	RSMRST#	13	14
				AD16
	CPURST#	15	16
				AD17
	VCC3_3SBY	17	18
				AD18
	VCC2_5	19	20
				AD19
	VCC2_5SBY	21	22
				AD20
	VCC1_8SBY	23	24
				AD21
	VCC3_3	25	26
				AD22
	VDDQ	27	28
				AD23
				AD24
				AD25
				AD26
				AD27
				AD28
				AD29
				AD30
				AD31
			25,26	C_BE#0
			25,26	C_BE#1
			25,26	C_BE#2
			C_BE#[3:0]	C_BE#3
	25,26		25,26
			25,26,38	DEVSEL#
				FRAME#
			25,26,38
				IRDY#
			25,26,38
				TRDY#
			25,26,38
				STOP#
			25,26,38
				PAR
			25,26
				PCIRST#
	6,8,10,11,12,24,25,26,27
				PLOCK#
			25,26,38
				SERR#
			25,26,38
				PERR#
			25,26,38
				PCI_PME#
		VCC3_3
			24,25,26
			R14
			10K GNT#A
			26	ICHPCLK
			5
				PIRQE#
				GPIO3
				GPIO4
				GPIO7
Led Blink with GPIO				GPIO8
				GPIO12
2	1			GPIO18
CR3			TP3	GPIO19
			TP4	GPIO20
			DRCG_CTRL
			5	MULT0_GPIO
			5
				8.2K
			R11
			R6	8.2K
			PRIMARY_DN#
			15

5

	U13
AA4	AD0
AB4	AD1
Y4
	AD2
W5
	AD3
W4
	AD4
Y5
	AD5
AB3
	AD6
AA5
	AD7
AB5
	AD8				ICH2
Y3
	AD9
W6	AD10
W3
	AD11
Y6
	AD12
Y2
	AD13
AA6
	AD14
Y1
	AD15
V2
	AD16
AA8
	AD17
V1
	AD18
AB8
	AD19
U4
	AD20
W9
	AD21					GND;N11,N12,N13,N14,N9,P10,P11,P12,P13,P14,P9,AA1,AA2,AA21,AA22,AB1,AB2,AB21,AB22
W11		_8;D10,D2,E5,K19,L19,P5,V9VCC1	_3;E14,E15,E16,E17,E18,F18,G18,H18,J18VCC3	_3;P18,R18,R5,T5,U5,V5,V6,V7,V8VCC3	GND;A1,A10,A2,A21,A22,B1,B10,B2,B3,B21,B22,B9,C2,C3,C4,C9,D3,D5,D6,D7,D8,D9 GND;E6,E7,E8,E9,J10,J11,J12,J13,J14,J9,K1,K10,K11,K12,K13,K14 GND;K9,L10,L11,L12,L13,L14,L9,M10,M11,M12,M13,M14,M9,N10
	PCICLK
U3	AD22
Y9	AD23
U2	AD24
AB9	AD25	PCI
U1	AD26
W10	AD27
T4	AD28
Y10	AD29
T3	AD30
AA10	AD31
AA3	C/BE#0
AB6	C/BE#1
Y8	C/BE#2
AA9	C/BE#3
AB7	DEVSEL#
V3
	FRAME#
W8
	IRDY#
V4
	TRDY#
W1
	STOP#
W2
	PAR
AA15
	PCIRST#
AA7	PLOCK#
W7
	SERR#
Y7
	PERR#
Y15
	PME#
M3
	GPIO0/REQA#
L2	GPIO16/GNTA#
N3
N2	GPIO2/PIRQE#
	GPIO3
N1
	GPIO4
AA11
	GPIO7
Y14	GPIO8
W14
	GPIO12
AB15	GPIO13
A15	GPIO18	GPIO
D14
	GPIO19
C14
	GPIO20
L1
	GPIO21
B14
	GPIO22
A14	GPIO23
AB14
	GPIO27
AA14	GPIO28

4

			A20M#	D11
			CPUSLP#	A12
				R22
			FERR#
				A11
			IGNNE#
				C12
			INIT#
CPU				C11
			INTR
				B11
			NMI
				B12
			SMI#
				C10
			STPCLK#
				B13
			RCIN#
				C13
			A20GATE
				A13
		CPUPWRGD
			HL0	A4
			HL1	B5
				A5
			HL2
				B6
			HL3
				B7
			HL4
				A8
			HL5
			HL6	B8
				A9
HUB			HL7
				C8
			HL8
				C6
			HL9
			HL10	C7
				C5
			HL11
				A6
			HL_STB
				A7
			HL_STB#
				A3
			HLCOMP
				B4
			HUBREF
			PIRQA#	P1
			PIRQB#	P2
				P3
			PIRQC#
				N4
			PIRQD#
			IRQ14	F21
			IRQ15	C16
				N20
IRQ			APICCLK
				P22
			APICD0
				N19
			APICD1
				N21
			SERIRQ
			REQ#0	R2
			REQ#1	R3
				T1
			REQ#2
				AB10
			REQ#3
			REQ#4	P4
				L3
PCI	GPIO1/REQB#/REQ5#
			GNT#0	M2
				M1
			GNT#1
				R4
			GNT#2
				T2
			GNT#3
				R1
			GNT#4
				L4
	GPIO17/GNTB#/GNT5#
			LAN_RXD0	G2
			LAN_RXD1	G1
			LAN_RXD2	H1
			LAN_TXD0	F3
LAN			LAN_TXD1	F2
			LAN_TXD2	F1
			LAN_CLK	G3
		LAN_RSTSYNC		H2

3

A20M#

CPUSLP#

FERR#

IGNNE#

HINIT#

LINT0

LINT1

SMI#

STPCLK#

KBRST#

A20GATE

HL0

HL1

HL2

HL3

HL4

HL5

HL6

HL7

HL8

HL9

HL10

HL11_TP

HL_STB

HL_STB#

ICH_HLCOMP

PIRQ#A

PIRQ#B

PIRQ#C

PIRQ#D

IRQ14

IRQ15

APICCLK_ICH

APICD0

APICD1

SERIRQ

PREQ#0

PREQ#1

PREQ#2

PREQ#3

PREQ#4

PREQ#5

PGNT#0

PGNT#1

PGNT#2

PGNT#3

PGNT#4

PGNT#5

LAN_RXD0_ICH2 LAN_RXD1_ICH2 LAN_RXD2_ICH2 LAN_TXD0_ICH2 LAN_TXD1_ICH2 LAN_TXD2_ICH2

LAN_CLK_ICH2

LAN_RST_ICH2

2	1
4
4
4,38	VCC2_5
4
4,10

4

D

4	R5	330
4
4
12,38
12,38		PWRGOOD

4,8,36

HL[10:0]

7

Place R138 less than 0.5" from the ICH using a 10 mil trace.

	VCC1_8
TP1	R15	40.2-1%
7					C
7
	HUBREF		6,8
24,25,26,38		C5
24,25,26,38
		0.01UF	Place C237 close to ICH.
25,26,38
25,26,38
27,38
27,38
5
4,38
4,38
12,26,38
25,38			VCC1_8
25,38
26,38
38					B
38
26,38			R19	-3011%
25,38
25,38
26,38
38		6,8	HUBREF
38
26				301-1%
16			R16
16				C31	0.1UF
16
16
16
16
16
16					A

Place HUBREF circuit between MCH and ICH

HUBREF voltage = 0.9V +/- 2%

TITLE: INTEL(R) 820E CHIPSET 2 DIMM FCPGA REFERENCE BOARD				REV:
ICH2			DRAWN BY:	0.5
	R	PCG PLATFORM DESIGN		PROJECT:
			PCG AE	Camino2
		1900 PRAIRIE CITY ROAD
		FOLSOM, CALIFORNIA 95630	LAST REVISED:	SHEET:
			3-20-2000_14:02	8 OF 40

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