8

7

6

5

ICH2 AC97 AND CNR LINK STUFFING OPTIONS

4

3

2

1

 

22 OHMS ARE PROVIDED TO MINIMIZE

D

STUBS ON AC97 LINK

AC_SDATAIN0_ICH2

9

AC_SYNC_ICH2

9

AC_SDATAOUT_ICH2

9

Stuff for CNR

RP7

18

27

3 6

45

0K

5%

RP49

18

27

3 6

45

0K

5%

AC_SDATAIN0_CNR

D

15

AC_SYNC_CNR

 

15

 

AC_SDATAOUT_CNR

 

15

 

Stuffing Option for

CNR OR LAN DOWN

AC_SDATAIN0

13

AC_SYNC

13

AC_SDATAOUT

9,13

C

B

Stuff for LAN Down

Stuff for CNR

RP50

18

27

3 6

45

22

5%

RP51

18

27

3 6

45

22

5%

Stuff for LAN Down

LAN_TXD0_CNR

15

LAN_TXD1_CNR

15

LAN_TXD2_CNR

15

LAN_RXD0_CNR

15

LAN_RXD1_CNR

15

LAN_RXD2_CNR

15

LAN_RST_CNR

15

LAN_CLK_CNR

15

Stuffing Option for

CNR OR LAN DOWN

C

B

 

8

LAN_TXD0_ICH2

 

8

LAN_TXD1_ICH2

 

 

 

 

8

LAN_TXD2_ICH2

 

LAN_RXD0_ICH2

 

 

8

 

 

LAN_RXD1_ICH2

 

8

 

LAN_RXD2_ICH2

 

8

 

LAN_RST_ICH2

 

8

A

LAN_CLK_ICH2

8

 

 

 

 

1

RP52

8

2

7

3

6

4

5

 

22

 

5%

1

RP53

8

2

7

3

6

4

5

 

22

 

5%

LAN_TXD0

LAN_TXD1

LAN_TXD2

LAN_RXD0

LAN_RXD1 LAN_RXD2

LAN_RESET

LAN_CLK

17,18

18

18

17,18

18

18

17,18

17,18

TITLE: INTEL(R) 820E CHIPSET 2 DIMM FCPGA REFERENCE BOARD ICH2 AC97 AND CNR STUFFING OPTIONS

 

 

R

PCG PLATFORM DESIGN

DRAWN BY:

 

 

PCG AE

 

 

 

1900 PRAIRIE CITY ROAD

 

 

 

FOLSOM, CALIFORNIA 95630

LAST REVISED:

 

 

 

3-20-2000_10:29

 

 

 

 

A

REV:

0.5

PROJECT:

Camino2

SHEET: 16 OF 40

8

7

6

5

4

3

2

1

Page 212
Image 212
Intel 820E manual Stubs on AC97 Link, ACSDATAIN0ICH2 ACSYNCICH2 ACSDATAOUTICH2, RP7, ACSDATAIN0CNR Acsynccnr Acsdataoutcnr