Intel 820E Bit Hub Interface Hubref Generation Circuit Specifications, MCH ICH2 Hlrefa Hubref

Intel® 820E Chipset

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Table 16. 8-Bit Hub Interface HUBREF Generation Circuit Specifications

Buffer Mode	HUBREF Voltage Specification (V)		Recommended Resistor Values
			for the HUBREF Divider Circuit (Ω	)
Normal/Single	1/2 VCC 1_8 ±	2%	R1 = R2 = 150 ± 1%
Normal/Local	2/3 VCC 1_8 ±	2%	R1 = 150 ± 1%, R2 = 301 ± 1%

The single HUBREF divider should not be located more than 4 inches away from either MCH or ICH2. If the single HUBREF divider is located more than 4 inches away, then the locally generated hub interface reference dividers should be used instead. The reference voltage generated by a single HUBREF divider should be bypassed to ground at each component with a 0.0 µF capacitor located close to the component HUBREF pin. If the reference voltage is generated locally, the bypass capacitor must be close to the component HUBREF pin. Example HUBREF divider circuits are shown in the following figures.

Figure 43. 8-Bit Hub Interface with a Shared Reference Divider Circuit (Normal/Single Mode)

1.8 V

MCH

HLREF_A

	R1		ICH2
			HUBREF
C2	R2	C1	C2

hub_IF_ref_div_1

Figure 44. 8-Bit Hub Interface with Locally Generated Reference Divider Circuits (Normal/Local Mode)

1.8 V	1.8 V		1.8 V	1.8 V
MCH	R1	C1	R1	ICH2
		C1
C2				C2
HLREF_A				HUBREF
	R2		R2

hub_IF_ref_div_2

The resistor values, R1 and R2, must be rated at 1% tolerance. The selected resistor values ensure that the reference voltage tolerance is maintained over the input leakage specification. A 0.1 µF capacitor (C1 in the previous circuits) should be placed close to R1 and R2. Also, a 0.01 µF bypass capacitor (C2 in the previous circuits) should be placed within 0.25 inch of each HUBREF pin. The trace length from the divider circuit to the HLREF pin must be no longer than 3.5 inches.

76 Design Guide