Intel® 820E Chipset

R

Figure 51. CDC_DN_ENAB# Support Circuitry for a Single Codec on Motherboard

 

Codec A

Motherboard

CNR Board

 

 

 

 

 

SDATA_IN

 

 

 

 

RESET#

 

 

 

 

 

 

 

Codec C

 

 

 

 

RESET#

From AC '97

AC97_RESET#

 

 

SDATA_IN

Controller

 

 

 

 

 

 

 

Vcc

Codec D

 

 

 

 

To General

CDC_DN_ENAB#

 

RB

RESET#

 

1 k

Purpose Input

RA

 

 

SDATA_IN

 

 

 

 

 

 

 

 

10 k

 

 

 

To AC '97

SDATA_IN0

 

 

 

Digital

SDATA_IN1

 

 

 

Controller

 

 

 

 

 

 

 

 

 

 

 

CNR Connector

As shown in Figure 51, when a single codec is located on the motherboard, the resistor RA and the circuitry (AND and NOT gates) shown inside the dashed box must be implemented, on the motherboard. This circuitry is required in order to disable the motherboard codec when a CNR is installed which contains two AC ’97 codecs (or a single AC ’97 codec which must be the primary codec on the AC- Link).

By installing resistor RB (1 kΩ) on the CNR, the codec on the motherboard becomes disabled (held in reset) and the codec(s) on the CNR take control of the AC-Link. One possible example of using this architecture is a system integrator installing an audio plus modem CNR in a system already containing an audio codec on the motherboard. The audio codec on the motherboard would then be disabled, allowing all of the codecs on the CNR to be used.

The architecture shown in Figure 52 has some unique features. These include the possibility of the CNR being used as an upgrade to the existing audio features of the motherboard (by simply changing the value of resistor RB on the CNR to 100 kΩ). An example of one such upgrade is increasing from two-channel to four or six-channel audio.

Both Figure 52 and Figure 53 show a switch on the CNR board. This is necessary to connect the CNR board codec to the proper SDATA_INn line as to not conflict with the motherboard codec(s).

Design Guide

87

Page 87
Image 87
Intel 820E manual Motherboard CNR Board