Intel 820E manual Conclusion, Flight Time Definition and Measurement

Intel® 820E Chipset

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3.5.4.Flight Time Definition and Measurement

Timing measurements consist of minimum and maximum flight times, to take into account the fact that devices can turn on or off anywhere in a VREF guard band region. This region is bounded by

VREF – ∆ VREF and VREF + ∆ VREF. The minimum flight time for a rising edge is measured from the time the driver crosses VREF when terminated to a test load, to the time when the signal first crosses

VREF – ∆ VREF at the receiver (see Figure 85). Maximum flight time is measured to the point where the signal first crosses VREF + ∆ VREF, assuming that the ringback, edge rate, and monotonicity criteria are met. Similarly, minimum flight time measurements for a falling edge are taken at the

VREF + ∆ VREF crossing, and maximum flight time is taken at the VREF – ∆ VREF crossing.

Figure 85. Rising-Edge Flight Time Measurement

	Receiver Pin
	Driver pin into
	test load
VREF + 200 mV				Overdrive Region
VREF + 100 mV		∆ VREF
	∆ VREF		VREF	Guardband
VREF
VREF - 100 mV
		Tflight-max
		Tflight-min

rising_edge_flight

3.6.Conclusion

AGTL+ routing requires a significant amount of effort. Planning ahead and allocating the necessary time for correctly designing a board layout will give the designer the best chance of avoiding the more difficult task of debugging inconsistent failures caused by poor signal integrity. Intel recommends planning a layout schedule that allows time for each of the tasks outlined in this document.

162 Design Guide