Intel 820E manual Miscellaneous Signals, Power, Spkr, 5VREF SUS

				Intel® 820E Chipset
	R
Table 39. Miscellaneous Signals
		Checklist Items	Recommendations	Reason/Effect
		SPKR	No extra pull-up resistors	Has integrated pull-up with a resistance
			Effective impedance due to speaker and	between 18 kΩ and 42 kΩ . The integrated pull-
				up is enabled only during boot/reset for
			codec circuitry must be greater than 50
				strapping functions. At all other times, the pull-
			kΩ , or a means to isolate the resistive
				up is disabled.
			load from the signal while PWROK is low
			must be found.	A low effective impedance may cause the
				TCO Timer Reboot function to be erroneously
				disabled.
		TP[0]	Requires external pull-up resistor to	This signal is used for BATLOW in mobile, but
			VCCSUS3.3.	it is not required for desktop.
		FS[0]	Route to a test point.	ICH2 contains an integrated pull-up for this
				signal. Test point used for manufacturing
				appears in XOR tree.
Table 40. Power
		Checklist Items	Recommendations	Reason/Effect
		V_CPU_IO[1:0]	The power pins should be connected to	Used to pull-up all processor I/F signals
			the proper power plane for the
			processor's CMOS compatibility signals.
			Use one 0.1 µF decoupling cap.
		Vcc RTC	No clear CMOS jumper on Vcc RTC. Use
			a jumper on RTCRST# or a GPI, or use
			safe-mode strapping for clear CMOS
		Vcc 3.3 V	Requires six 0.1 µF decoupling caps
		Vcc Sus 3.3 V	Requires one 0.1 µF decoupling cap.
		Vcc 1.8 V	Requires two 0.1 µF decoupling caps.
		Vcc Sus 1.8 V	Requires one 0.1 µF decoupling cap.
		5V_REF SUS	Requires one 0.1 µF decoupling cap.
			V5REF_SUS affects only the 5 V
			tolerance for USB OC[3:0] ins, and it can
			be connected to VccSUS3_3 if 5 V
			tolerance is not required for these
			signals.
		5V_REF	5 VREF is the reference voltage for 5 V-	Refer to Figure 73, which shows an example
			tolerant inputs in the ICH2. The	circuit schematic that may be used to ensure
			VREF[2:1] pins must be tied together. 5	the proper 5 VREF sequencing.
			VREF must power up before or
			simultaneously with Vcc 3_3. It must
			power down after or simultaneously with
			Vcc 3_3.

Design Guide 131