8

7

6

5

4

3

2

1

Power Connector

D

C

 

VCC5SBY

 

VCC3_3SBY

 

 

 

R347

4.7K

VCC5

U20

14VCC

PS_ON#

 

5

6

 

7 GND

SN74LVC06A

VCC12-

ATX Connector

VCC3_3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC5SBY

 

J24

 

 

 

 

 

VCC12

 

 

 

 

 

 

 

 

11

 

 

 

 

 

1

 

 

 

3_3V11

3_3V1

 

 

 

 

 

12

 

 

 

2

 

 

 

-12V

3_3V2

 

 

 

 

 

13

 

 

 

3

 

 

 

GND13

GND3

 

 

 

 

 

14

 

PS_0N

ATX 5V4

 

 

4

 

 

 

15

 

 

 

5

 

 

 

GND15

GND5

 

 

 

 

 

16

 

 

 

6

 

 

 

GND16

5V6

 

 

 

 

 

17

 

 

 

7

 

 

 

GND17

GND7

 

 

 

 

 

18

 

-5V

PW_OK

 

 

8

 

 

 

19

 

 

9

 

 

 

5V19

5VSB

 

 

 

 

ITP Reset circuit. For debug only.

 

74LVC14A has 5V input tolerance.

 

 

 

 

 

 

 

 

 

 

 

VCC3_3SBY

 

 

VCC3_3SBY

 

 

VCC3_3SBY

 

 

 

U15 14

 

 

 

U15 14

 

 

 

 

 

U3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

2

POK_U1

3

4

POK_U2

1 14

 

 

 

 

3

POK_U3

 

74LVC14A7

 

 

74LVC14A7

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SN74LVC08A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R339

0K

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

 

DBRESET#

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

330 ohm pullup to VCC3_3 located on CPU sheet.

 

 

VCC2_5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC3_3SBY

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

D

SN74LVC06A has 5V output tolerance.

PS_ON

SLP_S3#

8,9,34

VCC3_3SBY

VCC3_3SBY

R536

20

5V20

12V

10

 

 

ATX_PWOK

VCC3_3SBY

R342ATX_PWOK_R

0K

No stuff R342 when ITP is used.

VCC5SBY

U18 74LS13214VCC

9

8

10

7 GND

SN74LVC06A has 5V input tolerance.

U20 14VCC

1 2

7 GND

SN74LVC06A

PWROK_INV

VCC3_3SBY

R96

330

PWRGOOD 4,8

VCC3_3SBY

R349

4.7K

C

B

10K

U15 14

 

 

 

 

 

VCOREDET#

13

12

VCOREDET

4

74LVC14A7

12

14

U3

11

 

 

13

SN74LVC08A

220 ohm pullup to VCC3_3 is located on VRM sheet.

 

U20

14VCC

 

PWROK 7,8,9,34

 

3

4

 

 

 

7 GND

 

 

 

SN74LVC06A

 

 

VCC3_3SBY

VCC3_3SBY

 

 

 

VCC3_3SBY

 

R348

1M

No stuff.

 

 

 

 

 

B

4,8,9,33

Reset Button

SW2

JP12

VRM_PWRGD

RSTBTN_SW

R343

22

 

C335

 

C328

 

 

 

 

0.01UF 10UF

 

 

 

 

 

 

For test only

R251

 

U15 14

 

U15 14

 

 

RSMRST_U

5

6

RSMRST 9

8

RSMRST#

22K

 

74LVC14A7

 

74LVC14A7

 

8,9

 

 

 

 

 

 

 

 

 

 

 

C266

 

 

 

 

 

 

1UF

 

 

R288

1M

 

 

 

 

 

 

No stuff.

 

 

 

 

 

 

For test only

A

Resume Reset circuitry using a 22 msec delay and Schmitt trigger logic.

8

7

6

5

4

3

TITLE: INTEL(R) 820E CHIPSET 2 DIMM FCPGA REFERENCE BOARD POWER CONNECTOR

 

 

R PCG PLATFORM DESIGN

DRAWN BY:

 

 

PCG AE

 

 

1900 PRAIRIE CITY ROAD

 

 

FOLSOM, CALIFORNIA 95630

LAST REVISED:

 

 

3-20-2000_10:15

 

 

 

2

1

REV:

0.5

PROJECT:

Camino2

SHEET: 36 OF 40

A

Page 232
Image 232
Intel 820E manual Power Connector