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REVISION 0.5FCPGA 2 RIMM ICH2 REFERENCE SCHEMATICS
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PCG PLATFORM DESIGN
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TITLE: INTEL(R) 820E CHIPSET 2 DIMM FCPGA REFERENCE BOARD
RPCG AE Camino2

Note that these schematics are preliminary and are subject to change.

INTEL(R) 820E CHIPSET
THESE SCHEMATICS ARE PROVIDED “AS IS” WITH NO WARRANTIES WHATSOEVER,
INCLUDING ANY WARRANTY OF MERCHANTABILITY, FITNESS FOR ANY PARTICULAR
PURPOSE, OR ANY WARRANTY OTHERWISE ARISING OUT OF PROPOSAL,
SPECIFICATION OR SAMPLES.
Information in this document is provided in connection with Intel products. No license, express or
implied, by estoppel or otherwise, to any intellectual property rights is granted by this document.
Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no
liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or
use of Intel products including liability or warranties relating to fitness for a particular purpose,
merchantability, or infringement of any patent, copyright or other intellectual property right. Intel
products are not intended for use in medical, life saving, or life sustaining applications. Intel may
make changes to specifications and product descriptions at any time, without notice.
The Intel 82820E chipset may contain design defects or errors known as errata which may cause
the product to deviate from published specifications. Current characterized errata are available on
request.
Intel may make changes to specifications and product descriptions at any time, without notice.
Copyright © Intel Corporation 2000.
*Third-party brands and names are the property of their respective owners.
Title Page
Cover S heet 1
Block Diagram 2
Processor Connector 3, 4
Clock Synthesizer 5
MCH 6, 7
ICH2 8, 9
FWH 10
RIMM Socket s 11
Super I/O 12
Audio 13,14
LAN 15,16,17,18,
LAN 19,20,21,22
System 23
AGP Connector 24
PCI Connectors 25,26
IDE Connectors 27
USB Connectors 28
Paralle l Po rt 29
Serial Ports 30
Keyboard/Mouse/Floppy Ports 31
Game Port 32
VRM 33
Voltage Regulators 34, 35
Power Connector 36
AGTL Te rmination 37
PCI/AGP Pullups/Pulldowns 38
RAMBUS Decoupling 39
Decoupling 40, 41
Revision History 42