Intel 820E manual SIO Routing, High-Speed Cmos Termination

Intel® 820E Chipset

R

Figure 33. High-Speed CMOS Termination

RIMM_0	RIMM_1
		Vterm
	R1	91 Ω
MCH
	R2	39 Ω
	high_spd_cmos_term

2.7.4.1.SIO Routing

The SIO signal must be routed from RIMM to RIMM, as shown in Figure 34. The SIO signal requires a 2.2 kΩ to 10 kΩ terminating resistor on the SOUT pin of the last RIMM. SIO is routed with a standard 5 mil-wide, 60 Ω trace. The motherboard routing lengths for the SIO signal are the same as those for RSL signals. (See Figure 34.)

Figure 34. SIO Routing Example

			N		N
			3		3
			2		2
82820	SIN	B36	1	A36 SOUT	1	A36 SOUT
MCH				SIN	B36
						2.2KΩ	-
				B		10KΩ
	A			0.4" - 0.45"
	0" - 3.50"
						sio_route.vsd

Design Guide 55