Intel 820E manual Primary IDE Connector Requirements

Intel® 820E Chipset

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2.12.4.Primary IDE Connector Requirements

Figure 48. Connection Requirements for Primary IDE Connector

	PCIRST_BUF#	22–47 Ω
PCIRST# *			Reset#
PDD[15:0]
PDA[2:0]
PDCS1#
PDCS3#
PDIOR#
PDIOW#
PDDREQ	3.3 V
	3.3 V
4.7 kΩ	8.2–10 kΩ		Primary IDE
			Connector
PIORDY
IRQ14
PDDACK#
GPIOx			PDIAG# / CBLID#
	10 kΩ		CSEL
ICH2		N.C.	Pins 32 & 34

*Due to ringing, PCIRST# must be buffered.

NOTES:

IDE_primary_conn_require

1.	22 Ω to 47 Ω series resistors are required on RESET#. The correct value should be determined for each
	unique motherboard design, based on the signal quality.
2.	An 8.2 kΩ to 10 kΩ pull-up resistor is required on IRQ14 and IRQ15 to VCC3.

3.A 4.7 kΩ pull-up resistor to VCC3 is required on PIORDY and SIORDY.

4.Series resistors can be placed on the control and data lines to improve signal quality. The resistors are place as close as possible to the connector. Values are determined for each unique motherboard design.

5.A 10 kΩ pull-down resistor to ground is required on the PDIAG/CBLID signal. This prevents the GPI pin from floating if a device is not present on the primary IDE interface.

Design Guide 83