Intel® 820E Chipset

 

 

 

R

 

 

 

Table 31. Interrupt Interface

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Checklist Items

 

Recommendations

Reason/Effect

 

 

 

 

 

 

 

 

 

 

 

PIRQ#[D:A]

These signals require a pull-up

In a non-APIC mode, the PIRQx# signals can be

 

 

 

 

 

resistor. A 2.7 kΩ pull-up resistor

routed to interrupts 3, 4, 5, 6, 7, 9, 10, 11, 12, 14 or

 

 

 

 

 

to VCC 5 V or an 8.2 kΩ pull-up

15. Each PIRQx# line has a separate Route Control

 

 

 

 

 

resistor to VCC 3.3 V is

Register.

 

 

 

 

 

recommended.

In the APIC mode, these signals are connected to

 

 

 

 

 

 

 

 

 

 

 

 

 

 

the internal I/O APIC, as follows: PIRQ[A]# is

 

 

 

 

 

 

 

connected to IRQ16, PIRQ[B]# to IRQ17, PIRQ[C]#

 

 

 

 

 

 

 

to IRQ18, and PIRQ[D]# to IRQ19. This frees the

 

 

 

 

 

 

 

ISA interrupts.

 

 

 

 

 

 

 

 

 

 

 

PIRQ#[G:F] /

These signals require a pull-up

In non-APIC mode, the PIRQx# signals can be

 

 

 

 

GPIO[4:3]

resistor. Recommend a 2.7 kΩ

routed to interrupts 3, 4, 5, 6, 7, 9, 10, 11, 12, 14 or

 

 

 

 

pull-up resistor to VCC 5 or an

15. Each PIRQx# line has a separate Route Control

 

 

 

 

 

 

 

 

 

 

8.2 kΩ pull-up resistor to VCC

Register.

 

 

 

 

 

3.3.

 

In APIC mode, these signals are connected to the

 

 

 

 

 

 

 

 

 

 

 

 

 

 

internal I/O APIC, as follows: PIRQ[E]# is

 

 

 

 

 

 

 

connected to IRQ20, PIRQ[F]# to IRQ21, PIRQ[G]#

 

 

 

 

 

 

 

to IRQ22, and PIRQ[H]# to IRQ23. This frees the

 

 

 

 

 

 

 

ISA interrupts.

 

 

 

 

 

 

 

 

 

 

 

PIRQ#[H]

These signals require a pull-up

In a non-APIC mode, the PIRQx# signals can be

 

 

 

 

PIRQ#[E]

resistor. A 2.7 kΩ pull-up resistor

routed to interrupts 3, 4, 5, 6, 7, 9, 10, 11, 12, 14 or

 

 

 

 

to VCC 5 or an 8.2 kΩ pull-up

15. Each PIRQx# line has a separate Route Control

 

 

 

 

 

 

 

 

 

 

resistor to VCC 3.3 is

Register.

 

 

 

 

 

recommended.

In the APIC mode, these signals are connected to

 

 

 

 

 

 

 

 

 

 

 

 

 

 

the internal I/O APIC, as follows: PIRQ[E]# is

 

 

 

 

 

 

 

connected to IRQ20, PIRQ[F]# to IRQ21, PIRQ[G]#

 

 

 

 

 

 

 

to IRQ22, and PIRQ[H]# to IRQ23. This frees the

 

 

 

 

 

 

 

ISA interrupts. If not needed for interrupts, these

 

 

 

 

 

 

 

signals can be used as GPIO.

 

 

 

 

 

 

 

 

 

 

 

APIC

• If the APIC is used

If the APIC is not used on UP systems:

 

 

 

 

 

150 Ω pull-up resistors on

Use pull-downs for each APIC signal. Do not share

 

 

 

 

 

 

APICD[0:1] ! Same as

a resistor to pull-up signals.

 

 

 

 

 

 

SC242 checklist: PICD[0:1]

 

 

 

 

 

 

Connect APICCLK to

 

 

 

 

 

 

 

CK133, with a 20 Ω to 33 Ω

 

 

 

 

 

 

 

series termination resistor.

 

 

 

 

 

 

• If the APIC is not used on UP

 

 

 

 

 

 

systems

 

 

 

 

 

 

APICCLK can either be tied

 

 

 

 

 

 

 

to GND or connected to

 

 

 

 

 

 

 

CK133, but cannot be left

 

 

 

 

 

 

 

floating.

 

 

 

 

 

 

Pull APICD[0:1] to GND

 

 

 

 

 

 

 

through 10 kΩ pull-down

 

 

 

 

 

 

 

resistors.

 

 

 

 

 

 

 

 

 

Design Guide

127

Page 127
Image 127
Intel 820E manual Interrupt Interface, Pirq#Da, Pirq#H, Pirq#E, Apic