DS33Z41 Quad IMUX Ethernet Mapper

Register Name:

 

LI.RAC0

 

 

 

 

 

 

Register Description:

 

Receive Aborted Byte Count 0 Register

 

 

 

Register Address:

 

11Ch

 

 

 

 

 

 

Bit #

7

6

5

4

3

 

2

1

0

Name

REBC7

REBC6

 

REBC5

REBC4

REBC3

 

REBC2

REBC1

REBC0

Default

0

0

 

0

0

0

 

0

0

0

Bits 7 to 0: Receive Aborted Byte Count (RBC7 to RBC0). Eight bits of a 32-bit value. Register description below.

Register Name:

LI.RAC1

 

 

 

 

 

 

Register Description:

Receive Aborted Byte Count 1 Register

 

 

 

Register Address:

11Dh

 

 

 

 

 

 

Bit #

7

6

5

4

3

 

2

1

0

Name

REBC15

REBC14

REBC13

REBC12

REBC11

 

REBC10

REBC9

REBC8

Default

0

0

0

0

0

 

0

0

0

Bits 7 to 0: Receive Aborted Byte Count (RBC15 to RBC8). Eight bits of a 32-bit value. Register description below.

Register Name:

LI.RAC2

 

 

 

 

 

 

Register Description:

Receive Aborted Byte Count 2 Register

 

 

 

Register Address:

11Eh

 

 

 

 

 

 

Bit #

7

6

5

4

3

 

2

1

0

Name

REBC23

REBC22

REBC21

REBC20

REBC19

 

REBC18

REBC17

REBC16

Default

0

0

0

0

0

 

0

0

0

Bits 7 to 0: Receive Aborted Byte Count (RBC16 to RBC23). Eight bits of a 32-bit value. Register description below.

Register Name:

LI.RAC3

 

 

 

 

 

 

Register Description:

Receive Aborted Byte Count 3 Register

 

 

 

Register Address:

11Fh

 

 

 

 

 

 

Bit #

7

6

5

4

3

 

2

1

0

Name

REBC31

REBC30

REBC29

REBC28

REBC27

 

REBC26

REBC25

REBC24

Default

0

0

0

0

0

 

0

0

0

Bits 7 to 0: Receive Aborted Byte Count (REBC31 to REBC24). These 32 bits indicate the number of bytes

contained in packets stored in the receive FIFO with an abort indication. Note: Bytes discarded due to FCS extraction, system loopback, FIFO reset, or an overflow condition may be included in this count.

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Maxim DS33Z41 specifications LI.RAC0, LI.RAC1, LI.RAC2, LI.RAC3