
DS33Z41 Quad IMUX Ethernet Mapper
11.7 SDRAM Timing
Table 11-12. SDRAM Interface Timing
PARAMETER | SYMBOL |
| 100MHz |
| UNITS | |
MIN | TYP | MAX | ||||
|
|
| ||||
SDCLKO Period | t1 | 9.7 | 10 | 10.3 | ns | |
SDCLKO Duty Cycle | t2 | 4 |
| 6 | ns | |
SDCLKO to SDATA Valid | t3 |
|
| 7 | ns | |
Write to SDRAM |
|
| ||||
|
|
|
|
| ||
SDCLKO to SDATA Drive On | t4 | 4 |
|
| ns | |
Write to SDRAM |
|
| ||||
|
|
|
|
| ||
SDCLKO to SDATA Invalid | t5 | 3 |
|
| ns | |
Write to SDRAM |
|
| ||||
|
|
|
|
| ||
SDCLKO to SDATA Drive Off | t6 |
|
| 4 | ns | |
Write to SDRAM |
|
| ||||
|
|
|
|
| ||
SDATA to SDCLKO Setup Time | t7 | 2 |
|
| ns | |
Read from SDRAM |
|
| ||||
|
|
|
|
| ||
SDCLKO to SDATA Hold Time | t8 |
|
| 2 | ns | |
Read from SDRAM |
|
| ||||
|
|
|
|
| ||
SDCLKO to SRAS, SCAS, SWE, SDCS Active | t9 |
|
| 5 | ns | |
Read or Write to SDRAM |
|
| ||||
|
|
|
|
| ||
SDCLKO TO SRAS, SCAS, SWE, SDCS | t10 | 2 |
|
| ns | |
Inactive Read or Write to SDRAM |
|
| ||||
|
|
|
|
| ||
SDCLKO to SDA, SBA Valid | t11 |
|
| 7 | ns | |
Read or Write to SDRAM |
|
| ||||
|
|
|
|
| ||
SDCLKO TO SDA, SBA Invalid | t12 | 2 |
|
| ns | |
Read or Write to SDRAM |
|
| ||||
|
|
|
|
| ||
SDCLKO to SDMASK Valid | t13 |
|
| 5 | ns | |
Read or Write to SDRAM |
|
| ||||
|
|
|
|
| ||
SDCLKO TO SDMASK Invalid | t14 | 2 |
|
| ns | |
Read or Write to SDRAM |
|
| ||||
|
|
|
|
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