
DS33Z41 Quad IMUX Ethernet Mapper
8.1Processor Interface
Microprocessor control of the DS33Z41 is accomplished through the 20 interface pins of the microprocessor port. The
The Chip Select (CS) pin must be brought to a logic low level to gain read and write access to the microprocessor port. With Intel timing selected, the Read (RD) and Write (WR) pins are used to indicate read and write operations and latch data through the interface. With Motorola timing selected, the
The interrupt output pin (INT) is an
8.1.1Read-Write/Data Strobe Modes
The processor interface can operate in either
8.1.2Clear on Read
The latched status registers will clear on a read access. It is important to note that in a
8.1.3Interrupt and Pin Modes
The interrupt (INT) pin is configurable to drive high or float when not active. The INTM bit controls the pin configuration, when it is set the INT pin will drive high when not active. After reset, the INT pin is in high impedance mode until an interrupt source is active and enabled to drive the interrupt pin.
23 of 167