
DS33Z41 Quad IMUX Ethernet Mapper
Register Name: |
| RBECB0R |
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Register Description: |
| Receive Bit Error Count Byte 0 Register |
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Register Address: |
| 94h |
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Bit # | 7 | 6 | 5 | 4 | 3 |
| 2 | 1 |
| 0 | |
Name | BEC7 | BEC6 |
| BEC5 | BEC4 | BEC3 |
| BEC2 | BEC1 |
| BEC0 |
Default | 0 | 0 |
| 0 | 0 | 0 |
| 0 | 0 |
| 0 |
Bits 7 to 0: Bit Error Count (BEC7 to BEC0). Lower eight bits of 24 bits. Register description below. |
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Register Name: |
| RBECB1R |
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Register Description: |
| Receive Bit Error Count Byte 1 Register |
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Register Address: |
| 95h |
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Bit # | 7 | 6 | 5 | 4 | 3 |
| 2 | 1 |
| 0 | |
Name | BEC15 | BEC14 |
| BEC13 | BEC12 | BEC11 |
| BEC10 | BEC9 |
| BEC8 |
Default | 0 | 0 |
| 0 | 0 | 0 |
| 0 | 0 |
| 0 |
Bits 7 to 0: Bit Error Count (BEC15 to BEC8). Eight bits of a 24 bit value. Register description below. |
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Register Name: |
| RBECR2 |
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Register Description: |
| Receive Bit Error Count Byte 2 Register |
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Register Address: |
| 96h |
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Bit # | 7 | 6 | 5 | 4 | 3 |
| 2 | 1 | 0 | |
Name | BEC23 | BEC22 |
| BEC21 | BEC20 | BEC19 |
| BEC18 | BEC17 | BEC16 |
Default | 0 | 0 |
| 0 | 0 | 0 |
| 0 | 0 | 0 |
Bits 7 to 0: Bit Error Count (BEC23 to BEC16). Upper
Bit Error Count (BEC23 to BEC0). These 24 bits indicate the number of bit errors detected in the incoming data stream. This count stops incrementing when it reaches a count of FF FFFFh. The associated bit error counter will not incremented when an OOS condition exists.
Register Name: |
| RBCB0 |
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Register Description: |
| Receive Bit Count Byte 0 Register |
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Register Address: |
| 98h |
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Bit # | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
Name | BC7 | BC6 |
| BC5 | BC4 | BC3 | BC2 | BC1 | BC0 |
Default | 0 | 0 |
| 0 | 0 | 0 | 0 | 0 | 0 |
Bits 7 to 0: Bit Count (BC7 to BC0). Eight bits of a
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