DS33Z41 Quad IMUX Ethernet Mapper
Register Name: |
| SU.TFRC |
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Register Description: |
| Transmit Frame Resend Control |
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Register Address: |
| 151h |
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Bit # | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
Name | — | — |
| — | — | NCFQ | TPDFCB | TPRHBC | TPRCB |
Default | 0 | 0 |
| 0 | 0 | 0 | 0 | 0 | 0 |
Bit 3: No Carrier Queue Flush Bar (NCFQ). If this bit is set to 1, the queue for data passing from Serial Interface to Ethernet Interface will not be flushed when loss of carrier is detected.
Bit 2: Transmit Packet Deferred Fail Control Enable (TPDFCB). If this bit if set to 1, the current frame is transmitted immediately instead of being deferred. If this bit is set to 0, the frame is deferred if CRS is asserted and sent when the CRS is unasserted indicating the media is idle.
Bit 1: Transmit Packet HB Fail Control Bar (TPRHBC). If this bit is set to 1, the current frame will not be retransmitted if a heartbeat failure is detected.
Bit 0: Transmit Packet Resend Control Bar (TPRCB). If this bit is set to 1, the current frame will not be retransmitted if any of the following errors have occurred:
•Jabber time out
•Loss of carrier
•Excessive deferral
•Late collision
•Excessive collisions
•Under run
•Collision
Note that blocking retransmission due to collision (applicable in MIII/Half Duplex Mode) can result in unpredictable system level behavior.
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