StorageTek 6 manual Addresses and Registers, SLSUREQ VM Requirements

The SLSUREQM macro maps the SLSUREQ reply header, parameter list, and return code values. Refer to “SLSUREQM Macro” on page 645 to see the record layout.

Reply header length is defined in SLSUREQM, and library element record lengths are defined in the SLUVxDAT macros. Return codes for each request (see “Return Codes” on page 634) are stored in register 15.

VM Requirement

The program issuing the SLSUREQ macro must include the SLSMAC MACLIB in the GLOBAL MACLIB definition.

GLOBAL MACLIB SLSMAC...

The SLSMAC MACLIB residing on the HSC run-disk (254) must be available to assemble the SLSUREQ program.

The SLSUCAL TXTLIB is required to access the SLSUCAL program. The TXTLIB must be available when needed:

•For the technique where the SLSUCAL is included in the SLSUREQ program (VCON), the SLSUCAL TXTLIB must be available at CMS command (LOAD/GENMOD) time.

•When SLSUCAL is loaded using the LOAD macro, the SLSUCAL TXTLIB must be available at program execution time.

The SLSUCAL TXTLIB must be included in the GLOBAL TXTLIB for both LOAD options.

GLOBAL TXTLIB SLSUCAL

SLSUREQ VM Requirements

The program issuing the SLSUREQ macro must include the SLSMAC MACLIB in the GLOBAL MACLIB definition:

GLOBAL MACLIB SLSMAC …

The SLSMAC MACLIB, which resides on HSC RUN-disk 254, must be available to assemble SLSUREQ.

The SLSUCAL TXTLIB is required to access the SLSUCAL routine.

Addresses and Registers

•RX-type address: specifies an address that is valid in an RX-type instruction.

•Register (2) - (12): indicates that one of the general registers, 2 through 12, should be specified, enclosed in parentheses. The register must have been previously loaded with the value required by the parameter. Unused bits must be zeroed.

•Register (13) must point to a 72-byte MVS register save area when a QCDS request is issued.

630VM/HSC 6.0 System Programmer’s Guide

1st ed., 6/30/04 - 312579601