Motorola MC68340 manual Section DMA Controller Module

Freescale Semiconductor, Inc.

11/2/95	SECTION 1: OVERVIEW	UM Rev 1
	Freescale Semiconductor, Inc.

TABLE OF CONTENTS (Continued)

Paragraph		P a g e
Number	Title	Number
5.7.1.3	Bus Controller Resources	5-89
5.7.1.3.1	Prefetch Controller	5-90
5.7.1.3.2	Write Pending Buffer	5-90
5.7.1.3.3	Microbus Controller	5-91
5.7.1.4	Instruction Execution Overlap	5-91
5.7.1.5	Effects of Wait States	5-92
5.7.1.6	Instruction Execution Time Calculation	5-92
5.7.1.7	Effects of Negative Tails	5-93
5.7.2	Instruction Stream Timing Examples	5-94
5.7.2.1	Timing Example 1—Execution Overlap	5-94
5.7.2.2	Timing Example 2—Branch Instructions	5-95
5.7.2.3	Timing Example 3—Negative Tails	5-96
5.7.3	Instruction Timing Tables	5-97
5.7.3.1	Fetch Effective Address	5-99
5.7.3.2	Calculate Effective Address	5-100
5.7.3.3	MOVE Instruction	5-101
5.7.3.4	Special-Purpose MOVE Instruction	5-101
5.7.3.5	Arithmetic/Logic Instructions	5-102
5.7.3.6	Immediate Arithmetic/Logic Instructions	5-105
5.7.3.7	Binary-Coded Decimal and Extended Instructions	5-106
5.7.3.8	Single Operand Instructions	5-107
5.7.3.9	Shift/Rotate Instructions	5-108
5.7.3.10	Bit Manipulation Instructions	5-109
5.7.3.11	Conditional Branch Instructions	5-110
5.7.3.12	Control Instructions	5-111
5.7.3.13	Exception-Related Instructions and Operations	5-111
5.7.3.14	Save and Restore Operations	5-111

	Section 6
	DMA Controller	Module
6.1	DMA Module Overview		6-2
6.2	DMA Module Signal Definitions		6-4
6.2.1	DMA Request (DREQ≈)		6-4
6.2.2	DMA Acknowledge (DACK≈)		6-4
6.2.3	DMA Done (DONE≈)		6-4
6.3	Transfer Request Generation		6-4
6.3.1	Internal Request Generation		6-4
6.3.1.1	Internal Request, Maximum Rate		6-5
6.3.1.2	Internal Request, Limited Rate		6-5
6.3.2	External Request Generation		6-5
6.3.2.1	External Burst Mode		6-5
MOTOROLA	MC68340 USER'S	MANUAL	xi
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