Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

5.6.1.1BACKGROUND DEBUG MODE (BDM) OVERVIEW. Microprocessor systems generally provide a debugger, implemented in software, for system analysis at the lowest level. The BDM on the CPU32 is unique because the debugger is implemented in CPU microcode.

BDM incorporates a full set of debug options—registers can be viewed and/or altered, memory can be read or written, and test features can be invoked.

A resident debugger simplifies implementation of an in-circuit emulator. In a common setup (see Figure 5-18), emulator hardware replaces the target system processor. A complex, expensive pod-and-cable interface provides a communication path between target system and emulator.

 

 

 

 

 

IN-CIRCUIT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EMULATOR

 

 

 

TARGET

 

 

 

 

 

 

 

 

TARGET

 

 

 

.. .

 

 

 

 

 

 

 

SYSTEM

 

 

 

 

MCU

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 5-18. In-Circuit Emulator Configuration

By contrast, an integrated debugger supports use of a bus state analyzer (BSA) for in- circuit emulation. The processor remains in the target system (see Figure 5-19), and the interface is simplified. The BSA monitors target processor operation and the on-chip debugger controls the operating environment. Emulation is much closer to target hardware; thus, many interfacing problems (i.e., limitations on high-frequency operation, AC and DC parametric mismatches, and restrictions on cable length) are minimized.

TARGET

SYSTEM

TARGET

 

 

 

BUS STATE

 

 

 

MCU

 

 

 

ANALYZER.

 

 

 

 

 

 

 

 

 

Figure 5-19. Bus State Analyzer Configuration

5.6.1.2DETERMINISTIC OPCODE TRACKING OVERVIEW. CPU32 function code outputs are augmented by two supplementary signals that monitor the instruction pipeline. The IFETCH output signal identifies bus cycles in which data is loaded into the pipeline and signals pipeline flushes. The IPIPE output signal indicates when each mid-instruction pipeline advance occurs and when instruction execution begins. These signals allow a BSA to synchronize with instruction stream activity. Refer to 5.6.3 Deterministic Opcode Tracking for complete information.

5.6.1.3ON-CHIP HARDWARE BREAKPOINT OVERVIEW. An external breakpoint input

and an on-chip hardware breakpoint capability permit breakpoint trap on any

5- 64MC68340 USER’S MANUALMOTOROLA

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Motorola MC68340 manual In-Circuit Emulator Configuration

MC68340 specifications

The Motorola MC68340 is a highly integrated microprocessor that was introduced in the early 1990s. It belongs to the 68000 family of microprocessors and is designed to cater to the demands of embedded systems, particularly in telecommunications and networking applications. This chip represents a significant evolution in microprocessor technology by combining a microprocessor core with additional peripherals on a single chip, making it an attractive solution for engineers looking to design compact and efficient systems.

One of the key features of the MC68340 is its 32-bit architecture, which allows for significant processing power and data handling capabilities. This architecture enables the processor to handle larger data sizes and perform more complex calculations compared to its 16-bit predecessors. The MC68340 operates at clock speeds typically ranging from 16 MHz to 25 MHz. Its dual instruction pipeline enhances throughput, allowing for simultaneous instruction fetches and executions, which significantly boosts performance.

A notable characteristic of the MC68340 is the inclusion of integrated peripherals, which help reduce the overall component count in a system. Key integrated components include a memory management unit (MMU), a direct memory access (DMA) controller, and various communication interfaces such as serial ports. The memory management capabilities enhance the processor's ability to manage memory resources efficiently, enabling it to support multitasking environments commonly found in modern computing.

In terms of connectivity, the MC68340 features connections for both synchronous and asynchronous serial communication, making it well-suited for networking tasks. The processor supports a range of bus standards, including address and data buses, which facilitate seamless interaction with peripheral devices.

Another important aspect of the MC68340 is its flexibility. The processor supports multiple operating modes, including multiple CPU configurations and compatibility with the Motorola 68000 family, allowing for easier integration into existing systems.

Moreover, the MC68340 boasts low power consumption compared to many of its contemporaries, making it an excellent choice for battery-operated applications, enhancing its appeal in sectors like telecommunications, industrial control, and automotive systems. Its combination of performance, integration, versatility, and efficiency has secured the MC68340 a reputable position in the annals of embedded systems technology, proving to be a valuable asset for developers and engineers alike.