Manuals / Motorola / Kitchen Appliance / Espresso Maker

Motorola MC68340 manual Instruction Head Tail Cycles

Models: MC68340

1 441
Download 441 pages 2.45 Kb
Page 236
Image 236

Freescale Semiconductor, Inc...

Freescale Semiconductor, Inc.

5.7.3.1FETCH EFFECTIVE ADDRESS. The fetch EA table indicates the number of clock periods needed for the processor to calculate and fetch the specified EA. The total number of clock cycles is outside the parentheses. The numbers inside parentheses (r/p/w) are included in the total clock cycle number. All timing data assumes two-clock reads and writes.

Instruction

Head

Tail

Cycles

Notes

Dn

–

–

0(0/0/0)

–

An

–

–

0(0/0/0)

–

(An)

1

1

3(X/0/0)

1

(An) +

1

1

3(X/0/0)

1

−(An)

2

2

4(X/0/0)

1

(d 16 ,An) or (d16 ,PC)

1

3

5(X/1/0)

1,3

(xxx).W

1

3

5(X/1/0)

1

(xxx).L

1

5

7(X/2/0)

1

#〈data〉.B

1

1

3(0/1/0)

1

#〈data〉.W

1

1

3(0/1/0)

1

#〈data〉.L

1

3

5(0/2/0)

1

(d 8,An,Xn.Sz ⋅ Sc) or (d8,PC,Xn.Sz ⋅ Sc)

4

2

8(X/1/0)

1,2,3,4

(0) (All Suppressed)

2

2

6(X/1/0)

1,4

(d 16 )

1

3

7(X/2/0)

1,4

(d 32 )

1

5

9(X/3/0)

1,4

(An)

1

1

5(X/1/0)

1,2,4

(Xm.Sz ⋅ Sc)

4

2

8(X/1/0)

1,2,4

(An,Xm.Sz ⋅ Sc)

4

2

8(X/1/0)

1,2,3,4

(d 16 ,An) or (d16 ,PC)

1

3

7(X/2/0)

1,3,4

(d 32 ,An) or (d32 ,PC)

1

5

9(X/3/0)

1,3,4

(d 16 ,An,Xm) or (d16 ,PC,Xm)

2

2

8(X/2/0)

1,3,4

(d 32 ,An,Xm) or (d32 ,PC,Xm)

1

3

9(X/3/0)

1,3,4

(d 16 ,An,Xm.Sz ⋅ Sc) or (d16 ,PC,Xm.Sz ⋅ Sc)

2

2

8(X/2/0)

1,2,3,4

(d 32 ,An,Xm.Sz ⋅ Sc) or (d32 ,PC,Xm.Sz ⋅ Sc)

1

3

9(X/3/0)

1,2,3,4

X = There is one bus cycle for byte and word operands and two bus cycles for long-word operands. For long-word bus cycles, add two clocks to the tail and to the number of cycles.

NOTES:

1.The read of the EA and replacement fetches overlap the head of the operation by the amount specified in the tail.

2.Size and scale of the index register do not affect execution time.

3.The PC may be substituted for the base address register An.

4.When adjusting the prefetch time for slower buses, extra clocks may be subtracted from the head until the head reaches zero, at which time additional clocks must be added to both the tail and cycle counts.

MOTOROLAMC68340 USER’S MANUAL5- 99

For More Information On This Product,

Go to: www.freescale.com

Page 235 Page 237
Page 236
Image 236
Motorola MC68340 manual Instruction Head Tail Cycles
Page 235 Page 237

MC68340 specifications

The Motorola MC68340 is a highly integrated microprocessor that was introduced in the early 1990s. It belongs to the 68000 family of microprocessors and is designed to cater to the demands of embedded systems, particularly in telecommunications and networking applications. This chip represents a significant evolution in microprocessor technology by combining a microprocessor core with additional peripherals on a single chip, making it an attractive solution for engineers looking to design compact and efficient systems.

One of the key features of the MC68340 is its 32-bit architecture, which allows for significant processing power and data handling capabilities. This architecture enables the processor to handle larger data sizes and perform more complex calculations compared to its 16-bit predecessors. The MC68340 operates at clock speeds typically ranging from 16 MHz to 25 MHz. Its dual instruction pipeline enhances throughput, allowing for simultaneous instruction fetches and executions, which significantly boosts performance.

A notable characteristic of the MC68340 is the inclusion of integrated peripherals, which help reduce the overall component count in a system. Key integrated components include a memory management unit (MMU), a direct memory access (DMA) controller, and various communication interfaces such as serial ports. The memory management capabilities enhance the processor's ability to manage memory resources efficiently, enabling it to support multitasking environments commonly found in modern computing.

In terms of connectivity, the MC68340 features connections for both synchronous and asynchronous serial communication, making it well-suited for networking tasks. The processor supports a range of bus standards, including address and data buses, which facilitate seamless interaction with peripheral devices.

Another important aspect of the MC68340 is its flexibility. The processor supports multiple operating modes, including multiple CPU configurations and compatibility with the Motorola 68000 family, allowing for easier integration into existing systems.

Moreover, the MC68340 boasts low power consumption compared to many of its contemporaries, making it an excellent choice for battery-operated applications, enhancing its appeal in sectors like telecommunications, industrial control, and automotive systems. Its combination of performance, integration, versatility, and efficiency has secured the MC68340 a reputable position in the annals of embedded systems technology, proving to be a valuable asset for developers and engineers alike.