Freescale Semiconductor, Inc.

Table 5-23. BDM Command Summary

Semiconductor, Inc...

Command

Read A/D Register

Write A/D Register

Read System Register

Write System Register

Read Memory Location

Write Memory Location

Dump Memory Block

Fill Memory Block

Resume Execution

Call User Code

Reset Peripherals

No Operation

Mnemonic

Description

RAREG/RDREG

Read the selected address or data register and return the results

 

via the serial interface.

WAREG/WDREG

The data operand is written to the specified address or data

 

register.

RSREG

The specified system control register is read. All registers that can

 

be read in supervisor mode can be read in BDM.

WSREG

The operand data is written into the specified system control

 

register.

READ

Read the sized data at the memory location specified by the long-

 

word address. The SFC register determines the address space

 

accessed.

WRITE

Write the operand data to the memory location specified by the

 

long-word address. The DFC register determines the address

 

space accessed.

DUMP

Used in conjunction with the READ command to dump large blocks

 

of memory. An initial READ is executed to set up the starting

 

address of the block and to retrieve the first result. Subsequent

 

operands are retrieved with the DUMP command.

FILL

Used in conjunction with the WRITE command to fill large blocks of

 

memory. An initial WRITE is executed to set up the starting

 

address of the block and to supply the first operand. Subsequent

 

operands are written with the FILL command.

GO

The pipeline is flushed and refilled before resuming instruction

 

execution at the return PC.

CALL

Current PC is stacked at the location of the current SP. Instruction

 

execution begins at user patch code.

RST

Asserts RESET for 512 clock cycles. The CPU is not reset by this

 

command. Synonymous with the CPU RESET instruction.

NOP

NOP performs no operation and may be used as a null command.

Freescale

5.6.2.8.4Read A/D Register (RAREG/RDREG). Read the selected address or data register and return the results via the serial interface.

Command Format:

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

0

0

1

0

0

0

0

1

1

0

0

0

A/D

 

REGISTER

 

Command Sequence:

RDREG/RAREG

XXX

NEXT CMD

???

MS RESULT

LS RESULT

 

XXX

NEXT CMD

 

"ILLEGAL"

"NOT READY"

Operand Data:

None

5- 76MC68340 USER’S MANUALMOTOROLA

For More Information On This Product,

Go to: www.freescale.com

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Motorola MC68340 manual BDM Command Summary
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MC68340 specifications

The Motorola MC68340 is a highly integrated microprocessor that was introduced in the early 1990s. It belongs to the 68000 family of microprocessors and is designed to cater to the demands of embedded systems, particularly in telecommunications and networking applications. This chip represents a significant evolution in microprocessor technology by combining a microprocessor core with additional peripherals on a single chip, making it an attractive solution for engineers looking to design compact and efficient systems.

One of the key features of the MC68340 is its 32-bit architecture, which allows for significant processing power and data handling capabilities. This architecture enables the processor to handle larger data sizes and perform more complex calculations compared to its 16-bit predecessors. The MC68340 operates at clock speeds typically ranging from 16 MHz to 25 MHz. Its dual instruction pipeline enhances throughput, allowing for simultaneous instruction fetches and executions, which significantly boosts performance.

A notable characteristic of the MC68340 is the inclusion of integrated peripherals, which help reduce the overall component count in a system. Key integrated components include a memory management unit (MMU), a direct memory access (DMA) controller, and various communication interfaces such as serial ports. The memory management capabilities enhance the processor's ability to manage memory resources efficiently, enabling it to support multitasking environments commonly found in modern computing.

In terms of connectivity, the MC68340 features connections for both synchronous and asynchronous serial communication, making it well-suited for networking tasks. The processor supports a range of bus standards, including address and data buses, which facilitate seamless interaction with peripheral devices.

Another important aspect of the MC68340 is its flexibility. The processor supports multiple operating modes, including multiple CPU configurations and compatibility with the Motorola 68000 family, allowing for easier integration into existing systems.

Moreover, the MC68340 boasts low power consumption compared to many of its contemporaries, making it an excellent choice for battery-operated applications, enhancing its appeal in sectors like telecommunications, industrial control, and automotive systems. Its combination of performance, integration, versatility, and efficiency has secured the MC68340 a reputable position in the annals of embedded systems technology, proving to be a valuable asset for developers and engineers alike.
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