Freescale Semiconductor, Inc...

Freescale Semiconductor, Inc.

 

 

 

 

OPERAND

 

OP0

 

OP1

OP2

 

OP3

 

 

 

 

 

 

31

 

 

OP0

OP1

 

OP2

 

 

 

 

 

 

 

 

 

23

 

OP0

 

OP1

 

 

 

 

 

 

 

 

 

 

 

 

15

 

OP0

 

 

 

 

 

 

 

 

 

 

 

 

 

7

0

Case

Transfer Case

 

 

 

 

 

 

 

 

 

Data Bus

 

 

 

SIZ1

SIZ0

A0

 

DSACK1

DSACK0

D15

D8 D7

D0

(a)

Byte to Byte

0

1

X

1

 

0

 

OP0

 

(OP0)

 

(b)

Byte to Word (Even)

0

1

0

0

 

 

X

OP0

 

(OP0)

 

(c)

Byte to Word (Odd)

0

1

1

0

 

 

X

(OP0)

 

OP0

 

(d)

Word to Byte (Aligned)

1

0

0

1

 

0

 

OP0

 

(OP1)

 

(e)

Word to Word (Aligned)

1

0

0

0

 

 

X

OP0

 

OP1

 

(f)

Long Word to Byte (Aligned)

0

0

0

1

 

0

 

OP0

 

(OP1)

 

(g)

Long Word to Word (Aligned)

0

0

0

0

 

 

X

OP0

 

OP1

 

NOTES:

1.Operands in parentheses are ignored by the MC68340 during read cycles.

2.A 3-byte to byte transfer does occur as the second byte transfer of a long-word to byte port transfer.

Figure 3-2. MC68340 Interface to Various Port Sizes

3.2.2 Misaligned Operands

In this architecture, the basic operand size is 16 bits. Operand misalignment refers to whether an operand is aligned on a word boundary or overlaps the word boundary, determined by address line A0. When A0 is low, the address is even and is a word and byte boundary. When A0 is high, the address is odd and is a byte boundary only. A byte operand is properly aligned at any address; a word or long-word operand is misaligned at an odd address.

At most, each bus cycle can transfer a word of data aligned on a word boundary. If the MC68340 transfers a long-word operand over a 16-bit port, the most significant operand word is transferred on the first bus cycle, and the least significant operand word is transferred on a following bus cycle.

The CPU32 restricts all operands (both data and instructions) to be aligned. That is, word and long-word operands must be located on a word or long-word boundary, respectively. The only type of transfer that can be performed to an odd address is a single-byte transfer, referred to as an odd-byte transfer. If a misaligned access is attempted, the CPU32 generates an address error exception, and enters exception processing. Refer to Section 5 CPU32 for more information on exception processing.

3.2.3 Operand Transfer Cases

The following cases are examples of the allowable alignments of operands to ports.

3.2.3.1BYTE OPERAND TO 8-BIT PORT, ODD OR EVEN (A0 = X). The MC68340 drives the address bus with the desired address and the SIZx pins to indicate a single- byte operand.

MOTOROLAMC68340 USER’S MANUAL3- 7

For More Information On This Product,

Go to: www.freescale.com

Page 55 Page 57
Page 56
Image 56
Motorola MC68340 manual Misaligned Operands, Operand Transfer Cases
Page 55 Page 57

MC68340 specifications

The Motorola MC68340 is a highly integrated microprocessor that was introduced in the early 1990s. It belongs to the 68000 family of microprocessors and is designed to cater to the demands of embedded systems, particularly in telecommunications and networking applications. This chip represents a significant evolution in microprocessor technology by combining a microprocessor core with additional peripherals on a single chip, making it an attractive solution for engineers looking to design compact and efficient systems.

One of the key features of the MC68340 is its 32-bit architecture, which allows for significant processing power and data handling capabilities. This architecture enables the processor to handle larger data sizes and perform more complex calculations compared to its 16-bit predecessors. The MC68340 operates at clock speeds typically ranging from 16 MHz to 25 MHz. Its dual instruction pipeline enhances throughput, allowing for simultaneous instruction fetches and executions, which significantly boosts performance.

A notable characteristic of the MC68340 is the inclusion of integrated peripherals, which help reduce the overall component count in a system. Key integrated components include a memory management unit (MMU), a direct memory access (DMA) controller, and various communication interfaces such as serial ports. The memory management capabilities enhance the processor's ability to manage memory resources efficiently, enabling it to support multitasking environments commonly found in modern computing.

In terms of connectivity, the MC68340 features connections for both synchronous and asynchronous serial communication, making it well-suited for networking tasks. The processor supports a range of bus standards, including address and data buses, which facilitate seamless interaction with peripheral devices.

Another important aspect of the MC68340 is its flexibility. The processor supports multiple operating modes, including multiple CPU configurations and compatibility with the Motorola 68000 family, allowing for easier integration into existing systems.

Moreover, the MC68340 boasts low power consumption compared to many of its contemporaries, making it an excellent choice for battery-operated applications, enhancing its appeal in sectors like telecommunications, industrial control, and automotive systems. Its combination of performance, integration, versatility, and efficiency has secured the MC68340 a reputable position in the annals of embedded systems technology, proving to be a valuable asset for developers and engineers alike.
Top Page Image Contents