Boundary Scan Control Bits, Name Bit Number

Freescale Semiconductor, Inc.

Table 9-1. Boundary Scan Control Bits

Name	Bit Number	Name	Bit Number	Name	Bit Number
tout2.ctl	29	cs0.ctl	66	ab28.ctl	95
irq7.ctl	52	ab.ctl	83	ab29.ctl	97
irq6.ctl	54	berr.ctl	84	ab30.ctl	99
irq5.ctl	56	db.ctl	85	ab31.ctl	101
cs3.ctl	58	ab24.ctl	87	modck.ctl	122
irq3.ctl	60	ab25.ctl	89	ifetch.ctl	125
cs2.ctl	62	ab26.ctl	91	tout1.ctl	130
cs1.ctl	64	ab27.ctl	93

Boundary scan bit definitions are shown in Table 9-2. The first column in Table 9-2 defines the bit's ordinal position in the boundary scan register. The shift register bit nearest TDO (i.e., first to be shifted out) is defined as bit 0; the last bit to be shifted out is 131.

The second column references one of the five MC68340 cell types depicted in Figures 9-3–9-7, which describe the cell structure for each type.

The third column lists the pin name for all pin-related bits or defines the name of bidirectional control register bits. The active level of the control bits (i.e., output driver on) is defined by the last digit of the cell type listed for each control bit. For example, the active-high level for irq7.ctl (bit 52) is logic zero since the cell type is IO.Ctl0. The active level for ab.ctl (bit 83) is logic one, since the cell type is IO.Ctl1. IO.Ctl0 (see Figure 9-6) differs from IO.Ctl1 (see Figure 9-5) by an inverter in the output enable path.

The fourth column lists the pin type: TS-Output indicates a three-state output pin, I/O indicates a bidirectional pin, and OD-I/O denotes an open-drain bidirectional pin. An open- drain output pin has two states: off (high impedance) and logic zero.

The last column indicates the associated boundary scan register control bit for bidirectional, three-state, and open-drain output pins.

Bidirectional pins include a single scan bit for data (IO.Cell) as depicted in Figure 9-7. These bits are controlled by one of the two bits shown in Figures 9-5 and 9-6. The value of the control bit determines whether the bidirectional pin is an input or an output. One or more bidirectional data bits can be serially connected to a control bit as shown in Figure 9-

8.Note that, when sampling the bidirectional data bits, the bit data can be interpreted only after examining the IO control bit to determine pin direction.

9- 4MC68340 USER’S MANUALMOTOROLA

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MC68340 specifications

The Motorola MC68340 is a highly integrated microprocessor that was introduced in the early 1990s. It belongs to the 68000 family of microprocessors and is designed to cater to the demands of embedded systems, particularly in telecommunications and networking applications. This chip represents a significant evolution in microprocessor technology by combining a microprocessor core with additional peripherals on a single chip, making it an attractive solution for engineers looking to design compact and efficient systems.

One of the key features of the MC68340 is its 32-bit architecture, which allows for significant processing power and data handling capabilities. This architecture enables the processor to handle larger data sizes and perform more complex calculations compared to its 16-bit predecessors. The MC68340 operates at clock speeds typically ranging from 16 MHz to 25 MHz. Its dual instruction pipeline enhances throughput, allowing for simultaneous instruction fetches and executions, which significantly boosts performance.

A notable characteristic of the MC68340 is the inclusion of integrated peripherals, which help reduce the overall component count in a system. Key integrated components include a memory management unit (MMU), a direct memory access (DMA) controller, and various communication interfaces such as serial ports. The memory management capabilities enhance the processor's ability to manage memory resources efficiently, enabling it to support multitasking environments commonly found in modern computing.

In terms of connectivity, the MC68340 features connections for both synchronous and asynchronous serial communication, making it well-suited for networking tasks. The processor supports a range of bus standards, including address and data buses, which facilitate seamless interaction with peripheral devices.

Another important aspect of the MC68340 is its flexibility. The processor supports multiple operating modes, including multiple CPU configurations and compatibility with the Motorola 68000 family, allowing for easier integration into existing systems.

Moreover, the MC68340 boasts low power consumption compared to many of its contemporaries, making it an excellent choice for battery-operated applications, enhancing its appeal in sectors like telecommunications, industrial control, and automotive systems. Its combination of performance, integration, versatility, and efficiency has secured the MC68340 a reputable position in the annals of embedded systems technology, proving to be a valuable asset for developers and engineers alike.

Motorola MC68340 manual Boundary Scan Control Bits, Name Bit Number

Models: MC68340

Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

Table 9-1. Boundary Scan Control Bits

Name

Bit Number

9- 4MC68340 USER’S MANUALMOTOROLA

MC68340 specifications