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Motorola MC68340 manual Instruction Set Summary Concluded, Roxl,Roxr

Models: MC68340

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Freescale Semiconductor, Inc...

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Table 5-2. Instruction Set Summary (Concluded)

Opcode

Operation

 

Syntax

ROXL,ROXR

Destination Rotated with X by 〈count〉 ⇒ Destination

ROXd 1 Rx,Dy

 

 

 

ROXd 1 # 〈data 〉,Dy

 

 

 

ROXd 1 〈ea〉

RTD

(SP) ⇒ PC; SP + 4 + d ⇒ SP

 

RTD # 〈displacement〉

RTE

If supervisor state

 

RTE

 

the (SP) ⇒ SR; SP + 2 ⇒ SP; (SP) ⇒ PC;

 

 

SP + 4 ⇒ SP;

 

 

 

restore state and deallocate stack according to (SP)

 

 

else TRAP

 

 

RTR

(SP) ⇒ CCR; SP + 2 ⇒ SP;

 

RTR

 

(SP) ⇒ PC; SP + 4 ⇒ SP

 

 

RTS

(SP) ⇒ PC; SP + 4 ⇒ SP

 

RTS

SBCD

Destination10 – Source10 – X ⇒ Destination

SBCD Dx,Dy

 

 

 

SBCD –(Ax),–(Ay)

Scc

If Condition True

 

Scc 〈ea〉

 

then 1s ⇒ Destination

 

 

 

else 0s ⇒ Destination

 

 

STOP

If supervisor state

 

STOP #〈 data〉

 

then Immediate Data ⇒ SR; STOP

 

 

else TRAP

 

 

SUB

Destination – Source ⇒ Destination

SUB 〈 ea〉,Dn

 

 

 

SUB Dn,〈 ea〉

SUBA

Destination – Source ⇒ Destination

SUBA 〈 ea〉,An

SUBI

Destination – Immediate Data ⇒

Destination

SUBI # 〈data 〉,〈ea〉

SUBQ

Destination – Immediate Data ⇒

Destination

SUBQ #〈 data〉 ,〈ea〉

SUBX

Destination – Source – X ⇒ Destination

SUBX Dx,Dy

 

 

 

SUBX –(Ax),–(Ay)

SWAP

Register [31:16] ⇔ Register [15:0]

SWAP Dn

TAS

Destination Tested ⇒ Condition Codes;

TAS 〈 ea〉

 

1 ⇒ bit 7 of Destination

 

 

TBLS

ENTRY(n) + {(ENTRY(n + 1) – ENTRY(n)) *

TBLS.〈 size〉 〈ea〉, Dx

 

Dx[7:0]} / 256 ⇒ Dx

 

TBLS.〈 size〉 Dym:Dyn, Dx

TBLSN

ENTRY(n) ⋅ 256 + {(ENTRY(n + 1) – ENTRY(n)) *

TBLSN. 〈size〉 〈ea〉,Dx

 

Dx [7:0]} ⇒ Dx

 

TBLSN. 〈size〉 Dym:Dyn, Dx

TBLU

ENTRY(n) + {(ENTRY(n + 1) – ENTRY(n)) *

TBLU. 〈size〉 〈ea〉,Dx

 

Dx[7:0]} / 256 ⇒ Dx

 

TBLU. 〈size〉 Dym:Dyn, Dx

TBLUN

ENTRY(n) • 256 + {(ENTRY(n + 1) – ENTRY(n)) •

TBLUN. 〈size〉 〈ea〉,Dx

 

Dx[7:0]} ⇒ Dx

 

TBLUN. 〈size〉 Dym:Dyn,Dx

TRAP

SSP – 2 ⇒ SSP; Format/Offset ⇒ (SSP);

TRAP # 〈vector 〉

 

SSP – 4 ⇒ SSP; PC ⇒ (SSP); SSP – 2 ⇒ SSP;

 

 

SR ⇒ (SSP); Vector Address ⇒ PC

 

TRAPcc

If cc then TRAP

 

TRAPcc

 

 

 

TRAPcc.W #〈 data 〉

 

 

 

TRAPcc.L #〈 data〉

TRAPV

If V then TRAP

 

TRAPV

TST

Destination Tested ⇒ Condition Codes

TST 〈 ea〉

UNLK

An ⇒ SP; (SP) ⇒ An; SP + 4 ⇒ SP

UNLK An

NOTE 1: d is direction, L or R.

MOTOROLAMC68340 USER’S MANUAL5- 19

For More Information On This Product,

Go to: www.freescale.com

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Motorola MC68340 manual Instruction Set Summary Concluded, Roxl,Roxr
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MC68340 specifications

The Motorola MC68340 is a highly integrated microprocessor that was introduced in the early 1990s. It belongs to the 68000 family of microprocessors and is designed to cater to the demands of embedded systems, particularly in telecommunications and networking applications. This chip represents a significant evolution in microprocessor technology by combining a microprocessor core with additional peripherals on a single chip, making it an attractive solution for engineers looking to design compact and efficient systems.

One of the key features of the MC68340 is its 32-bit architecture, which allows for significant processing power and data handling capabilities. This architecture enables the processor to handle larger data sizes and perform more complex calculations compared to its 16-bit predecessors. The MC68340 operates at clock speeds typically ranging from 16 MHz to 25 MHz. Its dual instruction pipeline enhances throughput, allowing for simultaneous instruction fetches and executions, which significantly boosts performance.

A notable characteristic of the MC68340 is the inclusion of integrated peripherals, which help reduce the overall component count in a system. Key integrated components include a memory management unit (MMU), a direct memory access (DMA) controller, and various communication interfaces such as serial ports. The memory management capabilities enhance the processor's ability to manage memory resources efficiently, enabling it to support multitasking environments commonly found in modern computing.

In terms of connectivity, the MC68340 features connections for both synchronous and asynchronous serial communication, making it well-suited for networking tasks. The processor supports a range of bus standards, including address and data buses, which facilitate seamless interaction with peripheral devices.

Another important aspect of the MC68340 is its flexibility. The processor supports multiple operating modes, including multiple CPU configurations and compatibility with the Motorola 68000 family, allowing for easier integration into existing systems.

Moreover, the MC68340 boasts low power consumption compared to many of its contemporaries, making it an excellent choice for battery-operated applications, enhancing its appeal in sectors like telecommunications, industrial control, and automotive systems. Its combination of performance, integration, versatility, and efficiency has secured the MC68340 a reputable position in the annals of embedded systems technology, proving to be a valuable asset for developers and engineers alike.