Data Movement Operations, Instruction Syntax

Freescale Semiconductor, Inc...

Freescale Semiconductor, Inc.

Table 5-3. Condition Code Computations (Continued)

Operations	X	N	Z	V	C		Special Definition
ROR	—	∗	∗	0	?	C = Dr – 1
ROR (r = 0)	—	∗	∗	0	0

NOTE: The following notations apply to this table only.
—	=	Not affected	Sm	=	Source operand MSB
U	=	Undefined	Dm	=	Destination operand MSB
?	=	See special definition	Rm	=	Result operand MSB
∗	=	General case	R	=	Register tested
X	=	C	n	=	Bit Number
N	=	Rm	r	=	Shift count
Z	=	Rm Λ ... Λ R0	LB	=	Lower bound
Λ	=	Boolean AND	UB	=	Upper bound
V	=	Boolean OR	Rm	=	NOT Rm

5.3.3.2DATA MOVEMENT INSTRUCTIONS. The MOVE instruction is the basic means of transferring and storing address and data. MOVE instructions transfer byte, word, and long-word operands from memory to memory, memory to register, register to memory, and register to register. Address movement instructions (MOVE or MOVEA) transfer word and long-word operands and ensure that only valid address manipulations are executed.

In addition to the general MOVE instructions, there are several special data movement instructions—move multiple registers (MOVEM), move peripheral data (MOVEP), move quick (MOVEQ), exchange registers (EXG), load effective address (LEA), push effective address (PEA), link stack (LINK), and unlink stack (UNLK). Table 5-4 is a summary of the data movement operations.

Table 5-4. Data Movement Operations

	Operand
Instruction	Syntax	Operand Size	Operation
EXG	Rn, Rn	32	Rn ⇒ Rn
LEA	〈ea〉, An	32	〈ea〉 ⇒ An
LINK	An, #〈 d〉	16, 32	SP – 4 ⇒ SP, An ⇒ (SP); SP ⇒ An, SP + d ⇒ SP
MOVE	〈ea〉, 〈ea〉	8, 16, 32	Source ⇒ Destination
MOVEA	〈ea〉, An	16, 32 ⇒ 32	Source ⇒ Destination
MOVEM	list, 〈ea〉	16, 32	Listed registers ⇒ Destination
	〈ea〉, list	16, 32 ⇒ 32	Source ⇒ Listed registers
MOVEP	Dn, (d16, An)	16, 32	Dn [31:24] ⇒ (An + d); Dn [23:16] ⇒ (An + d + 2);
			Dn [15:8] ⇒ (An + d + 4); Dn [7:0] ⇒ (An + d + 6)
	(d 16, An), Dn		(An + d) ⇒ Dn [31:24]; (An + d + 2) ⇒ Dn [23:16];
			(An + d + 4) ⇒ Dn [15:8]; (An + d + 6) ⇒ Dn [7:0]
MOVEQ	#〈data〉, Dn	8 ⇒ 32	Immediate Data ⇒ Destination
PEA	〈ea〉	32	SP – 4 ⇒ SP; 〈 ea〉 ⇒ SP
UNLK	An	32	An ⇒ SP; (SP) ⇒ An, SP + 4 ⇒ SP

MOTOROLAMC68340 USER’S MANUAL5- 21

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MC68340 specifications

The Motorola MC68340 is a highly integrated microprocessor that was introduced in the early 1990s. It belongs to the 68000 family of microprocessors and is designed to cater to the demands of embedded systems, particularly in telecommunications and networking applications. This chip represents a significant evolution in microprocessor technology by combining a microprocessor core with additional peripherals on a single chip, making it an attractive solution for engineers looking to design compact and efficient systems.

One of the key features of the MC68340 is its 32-bit architecture, which allows for significant processing power and data handling capabilities. This architecture enables the processor to handle larger data sizes and perform more complex calculations compared to its 16-bit predecessors. The MC68340 operates at clock speeds typically ranging from 16 MHz to 25 MHz. Its dual instruction pipeline enhances throughput, allowing for simultaneous instruction fetches and executions, which significantly boosts performance.

A notable characteristic of the MC68340 is the inclusion of integrated peripherals, which help reduce the overall component count in a system. Key integrated components include a memory management unit (MMU), a direct memory access (DMA) controller, and various communication interfaces such as serial ports. The memory management capabilities enhance the processor's ability to manage memory resources efficiently, enabling it to support multitasking environments commonly found in modern computing.

In terms of connectivity, the MC68340 features connections for both synchronous and asynchronous serial communication, making it well-suited for networking tasks. The processor supports a range of bus standards, including address and data buses, which facilitate seamless interaction with peripheral devices.

Another important aspect of the MC68340 is its flexibility. The processor supports multiple operating modes, including multiple CPU configurations and compatibility with the Motorola 68000 family, allowing for easier integration into existing systems.

Moreover, the MC68340 boasts low power consumption compared to many of its contemporaries, making it an excellent choice for battery-operated applications, enhancing its appeal in sectors like telecommunications, industrial control, and automotive systems. Its combination of performance, integration, versatility, and efficiency has secured the MC68340 a reputable position in the annals of embedded systems technology, proving to be a valuable asset for developers and engineers alike.

Motorola MC68340 manual Data Movement Operations, Instruction Syntax

Models: MC68340

Freescale Semiconductor, Inc...

Freescale Semiconductor, Inc.

Table 5-3. Condition Code Computations (Continued)

Operations

ROR

Table 5-4. Data Movement Operations

Instruction

Syntax

MC68340 specifications