Freescale Semiconductor, Inc...

Freescale Semiconductor, Inc.

4.3.5.2PORT A PIN ASSIGNMENT REGISTER 2 (PPARA2). PPARA2 selects between an address and IACK≈ function for the port A pins. Any set bit defines the corresponding pin to be an IACK≈ output pin. Any cleared bit defines the corresponding pin to be an address bit as defined in the register diagram. Any set bits in PPARA1 override the configuration set in PPARA2. Bit 0 has no function in this register because there is no level 0 interrupt. This register can be read or written at any time.

PPARA2

 

 

 

 

 

$017

7

6

5

4

3

2

1

0

IACK7

IACK6

IACK5

IACK4

IACK3

IACK2

IACK1

0

(A31)

(A30)

(A29)

(A28)

(A27)

(A26)

(A25)

 

RESET:

 

 

 

 

 

 

 

0

0

0

0

0

0

0

0

Supervisor Only

The IACK≈ signals are asserted if a bit in PPARA2 is set and the CPU32 services an external interrupt at the corresponding level. IACK≈ signals have the same timing as address strobes.

NOTE:

Upon reset, port A is configured as an input port.

4.3.5.3PORT A DATA DIRECTION REGISTER (DDRA). DDRA controls the direction of the pin drivers when the pins are configured as I/O. Any set bit configures the corresponding pin as an output. Any cleared bit configures the corresponding pin as an input. This register affects only pins configured as discrete I/O. This register can be read or written at any time.

DDRA

 

 

 

 

 

 

$013

7

6

5

4

3

2

1

0

DD7

DD6

DD5

DD4

DD3

DD2

DD1

DD0

RESET:

 

 

 

 

 

 

 

0

0

0

0

0

0

0

0

Supervisor/User

4.3.5.4PORT A DATA REGISTER (PORTA). PORTA affects only pins configured as discrete I/O. A write to PORTA is stored in the internal data latch, and if any port A pin is configured as an output, the value stored for that bit is driven on the pin. A read of PORTA returns the value at the pin only if the pin is configured as discrete input. Otherwise, the value read is the value stored in the internal data latch. This register can be read or written at any time.

PORTA

 

 

 

 

 

$011

7

6

5

4

3

2

1

0

P7

P6

P5

P4

P3

P2

P1

P0

RESET:

 

 

 

 

 

 

 

U

U

U

U

U

U

U

U

 

 

 

 

 

Supervisor/User

4- 34

 

MC68340 USER’S MANUAL

 

MOTOROLA

For More Information On This Product,

Go to: www.freescale.com

Page 130 Page 132
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Motorola MC68340 manual Porta
Page 130 Page 132

MC68340 specifications

The Motorola MC68340 is a highly integrated microprocessor that was introduced in the early 1990s. It belongs to the 68000 family of microprocessors and is designed to cater to the demands of embedded systems, particularly in telecommunications and networking applications. This chip represents a significant evolution in microprocessor technology by combining a microprocessor core with additional peripherals on a single chip, making it an attractive solution for engineers looking to design compact and efficient systems.

One of the key features of the MC68340 is its 32-bit architecture, which allows for significant processing power and data handling capabilities. This architecture enables the processor to handle larger data sizes and perform more complex calculations compared to its 16-bit predecessors. The MC68340 operates at clock speeds typically ranging from 16 MHz to 25 MHz. Its dual instruction pipeline enhances throughput, allowing for simultaneous instruction fetches and executions, which significantly boosts performance.

A notable characteristic of the MC68340 is the inclusion of integrated peripherals, which help reduce the overall component count in a system. Key integrated components include a memory management unit (MMU), a direct memory access (DMA) controller, and various communication interfaces such as serial ports. The memory management capabilities enhance the processor's ability to manage memory resources efficiently, enabling it to support multitasking environments commonly found in modern computing.

In terms of connectivity, the MC68340 features connections for both synchronous and asynchronous serial communication, making it well-suited for networking tasks. The processor supports a range of bus standards, including address and data buses, which facilitate seamless interaction with peripheral devices.

Another important aspect of the MC68340 is its flexibility. The processor supports multiple operating modes, including multiple CPU configurations and compatibility with the Motorola 68000 family, allowing for easier integration into existing systems.

Moreover, the MC68340 boasts low power consumption compared to many of its contemporaries, making it an excellent choice for battery-operated applications, enhancing its appeal in sectors like telecommunications, industrial control, and automotive systems. Its combination of performance, integration, versatility, and efficiency has secured the MC68340 a reputable position in the annals of embedded systems technology, proving to be a valuable asset for developers and engineers alike.
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