Freescale Semiconductor, Inc...

Freescale Semiconductor, Inc.

Table 9-2. Boundary Scan Bit Definitions (Continued)

Bit

 

Pin/Cell

Pin

Output

Bit

 

Pin/Cell

Pin

Output

Num

Cell Type

Name

Type

CTL Cell

Num

Cell Type

Name

Type

CTL Cell

70

IO.Cell

D3

I/O

db.ctl

101

IO.Ctl0

ab31.ctl

71

IO.Cell

D4

I/O

db.ctl

102

IO.Cell

A0

I/O*

ab.ctl

72

IO.Cell

D5

I/O

db.ctl

103

IO.Cell

DSACK0

I/O**

berr.ctl

73

IO.Cell

D6

I/O

db.ctl

104

IO.Cell

DSACK1

I/O**

berr.ctl

74

IO.Cell

D7

I/O

db.ctl

105

IO.Cell

RMC

I/O*

ab.ctl

75

IO.Cell

D8

I/O

db.ctl

106

IO.Cell

R/ W

I/O*

ab.ctl

76

IO.Cell

D9

I/O

db.ctl

107

IO.Cell

SIZ1

I/O*

ab.ctl

77

IO.Cell

D10

I/O

db.ctl

108

IO.Cell

SIZ0

I/O*

ab.ctl

78

IO.Cell

D11

I/O

db.ctl

109

IO.Cell

DS

I/O*

ab.ctl

79

IO.Cell

D12

I/O

db.ctl

110

IO.Cell

AS

I/O*

ab.ctl

80

IO.Cell

D13

I/O

db.ctl

111

I.Pin

BGACK

Input

81

IO.Cell

D14

I/O

db.ctl

112

O.Latch

BG

Output

82

IO.Cell

D15

I/O

db.ctl

113

I.Pin

BR

Input

83

IO.Ctl1

ab.ctl

114

IO.Cell

BERR

I/O**

berr.ctl

84

IO.Ctl0

berr.ctl

115

O.Latch

HALT

OD-I/O

85

IO.Ctl1

db.ctl

116

I.Pin

HALT

OD-I/O

86

IO.Cell

A24

I/O

ab24.ctl

117

O.Latch

RESET

OD-I/O

87

IO.Ctl0

ab24.ctl

118

I.Pin

RESET

OD-I/O

88

IO.Cell

A25

I/O

ab25.ctl

119

O.Latch

CLKOUT

Output

89

IO.Ctl0

ab25.ctl

120

I.Pin

EXTAL

Input

90

IO.Cell

A26

I/O

ab26.ctl

121

IO.Cell

MODCK

I/O

modck.ctl

91

IO.Ctl0

ab26.ctl

122

IO.Ctl0

modck.ctl

92

IO.Cell

A27

I/O

ab27.ctl

123

O.Latch

IPIPE

Output

93

IO.Ctl0

ab27.ctl

124

IO.Cell

IFETCH

I/O*

ifetch.ctl

94

IO.Cell

A28

I/O

ab28.ctl

125

IO.Ctl0

ifetch.ctl

95

IO.Ctl0

ab28.ctl

126

I.Pin

BKPT

Input

96

IO.Cell

A29

I/O

ab29.ctl

127

O.Latch

FREEZE

Output

97

IO.Ctl0

ab29.ctl

128

I.Pin

TIN1

Input

98

IO.Cell

A30

I/O

ab30.ctl

129

O.Latch

TOUT1

TS-Output

tout1.ctl

99

IO.Ctl0

ab30.ctl

130

IO.Ctl0

tout1.ctl

100

IO.Cell

A31

I/O

ab31.ctl

131

I.Pin

TGATE1

Input

NOTES:

The noted pins are implemented differently than defined in the signal definition description:

*Input during Motorola factory test

**Output during Motorola factory test

9- 6MC68340 USER’S MANUALMOTOROLA

For More Information On This Product,

Go to: www.freescale.com

Page 381
Image 381
Motorola MC68340 manual Pin/Cell Output Bit Num Cell Type, Ipipe

MC68340 specifications

The Motorola MC68340 is a highly integrated microprocessor that was introduced in the early 1990s. It belongs to the 68000 family of microprocessors and is designed to cater to the demands of embedded systems, particularly in telecommunications and networking applications. This chip represents a significant evolution in microprocessor technology by combining a microprocessor core with additional peripherals on a single chip, making it an attractive solution for engineers looking to design compact and efficient systems.

One of the key features of the MC68340 is its 32-bit architecture, which allows for significant processing power and data handling capabilities. This architecture enables the processor to handle larger data sizes and perform more complex calculations compared to its 16-bit predecessors. The MC68340 operates at clock speeds typically ranging from 16 MHz to 25 MHz. Its dual instruction pipeline enhances throughput, allowing for simultaneous instruction fetches and executions, which significantly boosts performance.

A notable characteristic of the MC68340 is the inclusion of integrated peripherals, which help reduce the overall component count in a system. Key integrated components include a memory management unit (MMU), a direct memory access (DMA) controller, and various communication interfaces such as serial ports. The memory management capabilities enhance the processor's ability to manage memory resources efficiently, enabling it to support multitasking environments commonly found in modern computing.

In terms of connectivity, the MC68340 features connections for both synchronous and asynchronous serial communication, making it well-suited for networking tasks. The processor supports a range of bus standards, including address and data buses, which facilitate seamless interaction with peripheral devices.

Another important aspect of the MC68340 is its flexibility. The processor supports multiple operating modes, including multiple CPU configurations and compatibility with the Motorola 68000 family, allowing for easier integration into existing systems.

Moreover, the MC68340 boasts low power consumption compared to many of its contemporaries, making it an excellent choice for battery-operated applications, enhancing its appeal in sectors like telecommunications, industrial control, and automotive systems. Its combination of performance, integration, versatility, and efficiency has secured the MC68340 a reputable position in the annals of embedded systems technology, proving to be a valuable asset for developers and engineers alike.