Instruction Register | Motorola MC68340 guide

Freescale Semiconductor, Inc.

1	– EXTEST
0	– OTHERWISE	SHIFT DR

TO NEXT

CELL

OUTPUT

FROM

SYSTEM1

LOGICMUX

MUX

TO OUTPUT

DRIVER

1D
C1		1D
C1
		C1
		C1

Inc.

FROM OUTPUT FROM PIN	FROM LAST
ENABLE	CELL

CLOCK DR

UPDATE DR

Figure 9-7. Bidirectional Data Cell (IO.Cell)

Freescale Semiconductor,

OUTPUT ENABLE

OUTPUT DATA

INPUT

DATA

TO NEXT CELL

IO.CTL0

IO.CTL1

IO.CELL

FROM LAST CELL

TO NEXT

BIDIRECTIONAL

I/O

NOTE: More than one lO.Cell could be serially connected and controlled by a single IO.Ctlx cell.

Figure 9-8. General Arrangement for Bidirectional Pins

9.4 INSTRUCTION REGISTER

The MC68340 IEEE 1149.1 implementation includes the three mandatory public instructions (EXTEST, SAMPLE/PRELOAD, and BYPASS), but does not support any of the optional public instructions defined by IEEE 1149.1. One additional public instruction (HI-Z) provides the capability for disabling all device output drivers. The MC68340

MOTOROLAMC68340 USER’S MANUAL9- 9

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MC68340 specifications

The Motorola MC68340 is a highly integrated microprocessor that was introduced in the early 1990s. It belongs to the 68000 family of microprocessors and is designed to cater to the demands of embedded systems, particularly in telecommunications and networking applications. This chip represents a significant evolution in microprocessor technology by combining a microprocessor core with additional peripherals on a single chip, making it an attractive solution for engineers looking to design compact and efficient systems.

One of the key features of the MC68340 is its 32-bit architecture, which allows for significant processing power and data handling capabilities. This architecture enables the processor to handle larger data sizes and perform more complex calculations compared to its 16-bit predecessors. The MC68340 operates at clock speeds typically ranging from 16 MHz to 25 MHz. Its dual instruction pipeline enhances throughput, allowing for simultaneous instruction fetches and executions, which significantly boosts performance.

A notable characteristic of the MC68340 is the inclusion of integrated peripherals, which help reduce the overall component count in a system. Key integrated components include a memory management unit (MMU), a direct memory access (DMA) controller, and various communication interfaces such as serial ports. The memory management capabilities enhance the processor's ability to manage memory resources efficiently, enabling it to support multitasking environments commonly found in modern computing.

In terms of connectivity, the MC68340 features connections for both synchronous and asynchronous serial communication, making it well-suited for networking tasks. The processor supports a range of bus standards, including address and data buses, which facilitate seamless interaction with peripheral devices.

Another important aspect of the MC68340 is its flexibility. The processor supports multiple operating modes, including multiple CPU configurations and compatibility with the Motorola 68000 family, allowing for easier integration into existing systems.

Moreover, the MC68340 boasts low power consumption compared to many of its contemporaries, making it an excellent choice for battery-operated applications, enhancing its appeal in sectors like telecommunications, industrial control, and automotive systems. Its combination of performance, integration, versatility, and efficiency has secured the MC68340 a reputable position in the annals of embedded systems technology, proving to be a valuable asset for developers and engineers alike.

Motorola MC68340 manual Instruction Register, Bidirectional Data Cell IO.Cell

Models: MC68340