Freescale Semiconductor, Inc | Motorola MC68340 instruction

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IRQ—Interrupt Request

This bit is the logical OR of the DONE, BES, BED, CONF, and BRKP bits and is cleared when they are all cleared. IRQ is positioned to allow conditional testing as a signed binary integer. The state of this bit is not affected by the interrupt enable bits in the CCR. The STR bit in the CCR cannot be set when this bit is set; all error status bits, except the BRKP bit, must be cleared before the STR bit can be set.

1 = An interrupt condition has occurred.

0 = An interrupt condition has not occurred.

DONE—DMA Done

1 = The DMA channel has terminated normally.

0 = The DMA channel has not terminated normally. This bit is cleared by writing a logic one or by a hardware reset. Writing a zero has no effect.

BES—Bus Error on Source

1 = The DMA channel has terminated with a bus error during the read bus cycle.

0 = The DMA channel has not terminated with a bus error during the read bus cycle. This bit is cleared by writing a logic one or by a hardware reset. Writing a zero has no effect.

BED—Bus Error on Destination

1 = The DMA channel has terminated with a bus error during the write bus cycle.

0 = The DMA channel has not terminated with a bus error during the write bus cycle. This bit is cleared by writing a logic one or by a hardware reset. Writing a zero has no effect.

CONF—Configuration Error

A configuration error results when either the SAR or the DAR contains an address that does not match the port size specified in the CCR and the BTC register does not match the larger port size or is zero.

1 = The CCR STR bit is set, and a configuration error is present.

0 = The CCR STR bit is set, and no configuration error exists. This bit is cleared by writing a logic one or by a hardware reset. Writing a zero has no effect.

BRKP—Breakpoint

1 = The breakpoint signal was set during a DMA transfer.

0 = The breakpoint signal was not set during a DMA transfer. This bit is cleared by writing a logic one or by a hardware reset. Writing a zero has no effect.

Bits 1, 0—Reserved

NOTE

The CSR is cleared by writing $7C to its location. The DMA channel cannot be started until the CSR DONE, BES, BED, CONF and BRKP bits are cleared.

MOTOROLAMC68340 USER’S MANUAL6- 31

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MC68340 specifications

The Motorola MC68340 is a highly integrated microprocessor that was introduced in the early 1990s. It belongs to the 68000 family of microprocessors and is designed to cater to the demands of embedded systems, particularly in telecommunications and networking applications. This chip represents a significant evolution in microprocessor technology by combining a microprocessor core with additional peripherals on a single chip, making it an attractive solution for engineers looking to design compact and efficient systems.

One of the key features of the MC68340 is its 32-bit architecture, which allows for significant processing power and data handling capabilities. This architecture enables the processor to handle larger data sizes and perform more complex calculations compared to its 16-bit predecessors. The MC68340 operates at clock speeds typically ranging from 16 MHz to 25 MHz. Its dual instruction pipeline enhances throughput, allowing for simultaneous instruction fetches and executions, which significantly boosts performance.

A notable characteristic of the MC68340 is the inclusion of integrated peripherals, which help reduce the overall component count in a system. Key integrated components include a memory management unit (MMU), a direct memory access (DMA) controller, and various communication interfaces such as serial ports. The memory management capabilities enhance the processor's ability to manage memory resources efficiently, enabling it to support multitasking environments commonly found in modern computing.

In terms of connectivity, the MC68340 features connections for both synchronous and asynchronous serial communication, making it well-suited for networking tasks. The processor supports a range of bus standards, including address and data buses, which facilitate seamless interaction with peripheral devices.

Another important aspect of the MC68340 is its flexibility. The processor supports multiple operating modes, including multiple CPU configurations and compatibility with the Motorola 68000 family, allowing for easier integration into existing systems.

Moreover, the MC68340 boasts low power consumption compared to many of its contemporaries, making it an excellent choice for battery-operated applications, enhancing its appeal in sectors like telecommunications, industrial control, and automotive systems. Its combination of performance, integration, versatility, and efficiency has secured the MC68340 a reputable position in the annals of embedded systems technology, proving to be a valuable asset for developers and engineers alike.

Motorola MC68340 manual Freescale Semiconductor, Inc

Models: MC68340

Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

MOTOROLAMC68340 USER’S MANUAL6- 31

MC68340 specifications