Freescale Semiconductor, Inc | Motorola MC68340 manual

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SE—Single-Address Enable

This bit is implemented for future MC683xx family compatibility.

1 = In single-address mode, the external data bus is driven during a DMA transfer.

0 = In single-address mode, the external data bus remains in a high-impedance state during a DMA transfer (used for intermodule DMA).

In dual-address mode, the SE bit has no effect.

Bit 11—Reserved

ISM2–ISM0—Interrupt Service Mask

These bits contain the interrupt service mask level for the channel. When the interrupt service level on the IMB is greater than the interrupt service mask level, the DMA vacates the bus and negates BR until the interrupt service level is less than or equal to the interrupt service mask level.

NOTE

When the CPU32 status register (SR) interrupt priority mask bits I2–I0 are at a higher level than the DMA ISM bits, the DMA channel will not start. The channel will begin operation when the level of the SR I2–I0 bits is less than or equal to the level of the DMA ISM bits.

SUPV—Supervisor/User

The value of this bit has no effect on registers permanently defined as supervisor-only access.

1 = The DMA channel registers defined as supervisor/user reside in supervisor data space and are only accessible from supervisor programs.

0 = The DMA channel registers defined as supervisor/user reside in user data space and are accessible from either supervisor or user programs.

MAID—Master Arbitration ID

These bits establish bus arbitration priority level among modules that have the capability of becoming bus master. For the MC68340, the MAID bits are used to arbitrate between DMA channel 1 and channel 2. If both channels are programmed with the same MAID level, channel 1 will have priority. These bits are implemented for future MC683xx Family compatibility. In the MC68340, only the SIM and the DMA can be bus masters. However, future versions of the MC683xx Family may incorporate other modules that may also be bus masters. For these devices, the MAID bits will be required. For the MAID bits, zero is the lowest priority and seven is the highest priority.

IARB — Interrupt Arbitration ID

Each module that generates interrupts has an IARB field. These bits are used to arbitrate for the bus in the case that two or more modules simultaneously generate an interrupt at the same priority level. No two modules can share the same IARB value.

MOTOROLAMC68340 USER’S MANUAL6- 25

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MC68340 specifications

The Motorola MC68340 is a highly integrated microprocessor that was introduced in the early 1990s. It belongs to the 68000 family of microprocessors and is designed to cater to the demands of embedded systems, particularly in telecommunications and networking applications. This chip represents a significant evolution in microprocessor technology by combining a microprocessor core with additional peripherals on a single chip, making it an attractive solution for engineers looking to design compact and efficient systems.

One of the key features of the MC68340 is its 32-bit architecture, which allows for significant processing power and data handling capabilities. This architecture enables the processor to handle larger data sizes and perform more complex calculations compared to its 16-bit predecessors. The MC68340 operates at clock speeds typically ranging from 16 MHz to 25 MHz. Its dual instruction pipeline enhances throughput, allowing for simultaneous instruction fetches and executions, which significantly boosts performance.

A notable characteristic of the MC68340 is the inclusion of integrated peripherals, which help reduce the overall component count in a system. Key integrated components include a memory management unit (MMU), a direct memory access (DMA) controller, and various communication interfaces such as serial ports. The memory management capabilities enhance the processor's ability to manage memory resources efficiently, enabling it to support multitasking environments commonly found in modern computing.

In terms of connectivity, the MC68340 features connections for both synchronous and asynchronous serial communication, making it well-suited for networking tasks. The processor supports a range of bus standards, including address and data buses, which facilitate seamless interaction with peripheral devices.

Another important aspect of the MC68340 is its flexibility. The processor supports multiple operating modes, including multiple CPU configurations and compatibility with the Motorola 68000 family, allowing for easier integration into existing systems.

Moreover, the MC68340 boasts low power consumption compared to many of its contemporaries, making it an excellent choice for battery-operated applications, enhancing its appeal in sectors like telecommunications, industrial control, and automotive systems. Its combination of performance, integration, versatility, and efficiency has secured the MC68340 a reputable position in the annals of embedded systems technology, proving to be a valuable asset for developers and engineers alike.

Motorola MC68340 manual Freescale Semiconductor, Inc

Models: MC68340

Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

MOTOROLAMC68340 USER’S MANUAL6- 25

MC68340 specifications