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Motorola MC68340 manual Byte Transfer Counter Register BTC, DAR1, DAR2, BTC1, BTC2

Models: MC68340

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Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

DAR1, DAR2

 

 

 

 

 

 

 

 

 

 

 

$790, $7B0

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RESET:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

U

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RESET:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

U

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U

U = Unaffected by reset

 

 

 

 

 

 

 

 

 

Supervisor/User

During the DMA write cycle, this register drives the address on the address bus. This register can be programmed to increment (CCR DAPI bit set) or remain constant (CCR DAPI bit cleared) after each operand transfer.

The register is incremented using unsigned arithmetic and will roll over if overflow occurs. For example, if a register contains $FFFFFFFF and is incremented by 1, it will roll over to $00000000. This register can be incremented by 1, 2, or 4, depending on the size of the operand and the starting address. If the operand size is byte, the register is always incremented by 1. If the operand size is word and the starting address is even-word aligned, the register is incremented by 2. If the operand size is long word and the address is even-word aligned, the register is incremented by 4. The DAR value must be aligned to an even-word boundary if the transfer size is word or long word; otherwise, the CSR CONF bit is set, and the transfer does not occur.

When read, this register always contains the next destination address. If a bus error terminates the transfer, this register contains the next destination address that would have been run had the error not occurred.

6.7.8 Byte Transfer Counter Register (BTC)

The BTC is a 32-bit register that contains the number of bytes left to transfer in a given block. This register is accessible in either supervisor or user space. The BTC can always be read or written to when the DMA module is enabled (i.e., the STP bit in the MCR is cleared).

BTC1, BTC2

 

 

 

 

 

 

 

 

 

 

 

 

$794, $7B4

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A19

A18

A17

A16

RESET:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

U

U

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U

U

U

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U

U

U

U

U

U

U

U

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0

A15

A14

A13

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A11

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A8

A7

A6

A5

A4

A3

A2

A1

A0

RESET:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

U

U

U

U

U

U

U

U

U

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U

U

U

U

U

U

U = Unaffected by reset

 

 

 

 

 

 

 

 

 

Supervisor/User

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MC68340 USER’S MANUAL

 

 

 

 

MOTOROLA

For More Information On This Product,

Go to: www.freescale.com

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Motorola MC68340 manual Byte Transfer Counter Register BTC, DAR1, DAR2, BTC1, BTC2
Page 283 Page 285

MC68340 specifications

The Motorola MC68340 is a highly integrated microprocessor that was introduced in the early 1990s. It belongs to the 68000 family of microprocessors and is designed to cater to the demands of embedded systems, particularly in telecommunications and networking applications. This chip represents a significant evolution in microprocessor technology by combining a microprocessor core with additional peripherals on a single chip, making it an attractive solution for engineers looking to design compact and efficient systems.

One of the key features of the MC68340 is its 32-bit architecture, which allows for significant processing power and data handling capabilities. This architecture enables the processor to handle larger data sizes and perform more complex calculations compared to its 16-bit predecessors. The MC68340 operates at clock speeds typically ranging from 16 MHz to 25 MHz. Its dual instruction pipeline enhances throughput, allowing for simultaneous instruction fetches and executions, which significantly boosts performance.

A notable characteristic of the MC68340 is the inclusion of integrated peripherals, which help reduce the overall component count in a system. Key integrated components include a memory management unit (MMU), a direct memory access (DMA) controller, and various communication interfaces such as serial ports. The memory management capabilities enhance the processor's ability to manage memory resources efficiently, enabling it to support multitasking environments commonly found in modern computing.

In terms of connectivity, the MC68340 features connections for both synchronous and asynchronous serial communication, making it well-suited for networking tasks. The processor supports a range of bus standards, including address and data buses, which facilitate seamless interaction with peripheral devices.

Another important aspect of the MC68340 is its flexibility. The processor supports multiple operating modes, including multiple CPU configurations and compatibility with the Motorola 68000 family, allowing for easier integration into existing systems.

Moreover, the MC68340 boasts low power consumption compared to many of its contemporaries, making it an excellent choice for battery-operated applications, enhancing its appeal in sectors like telecommunications, industrial control, and automotive systems. Its combination of performance, integration, versatility, and efficiency has secured the MC68340 a reputable position in the annals of embedded systems technology, proving to be a valuable asset for developers and engineers alike.