Instruction Set, Mnemonic Description | Motorola MC68340 specs

Freescale Semiconductor, Inc.

Table 5-1. Instruction Set

Mnemonic	Description	Mnemonic	Description
ABCD	Add Decimal with Extend	MOVEA	Move Address
ADD	Add	MOVE CCR	Move Condition Code Register
ADDA	Add Address	MOVE SR	Move to/from Status Register
ADDI	Add Immediate	MOVE USP	Move User Stack Pointer
ADDQ	Add Quick	MOVEC	Move Control Register
AND	Logical AND	MOVEM	Move Multiple Registers
ANDI	Logical AND Immediate	MOVEP	Move Peripheral Data
ASL	Arithmetic Shift Left	MOVEQ	Move Quick
ASR	Arithmetic Shift Right	MOVES	Move Alternate Address Space
Bcc	Branch Conditionally (16 Tests)	MULS	Signed Multiply
BCHG	Bit Test and Change	MULU	Unsigned Multiply
BCLR	Bit Test and Clear	NBCD	Negate Decimal with Extend
BGND	Enter Background Mode	NEG	Negate
BKPT	Breakpoint	NEGX	Negate with Extend
BRA	Branch Always	NOP	No Operation
BSET	Bit Test and Set	NOT	Ones Complement
BSR	Branch to Subroutine	OR	Logical Inclusive OR
BTST	Bit Test	ORI	Logical Inclusive OR Immediate
CHK	Check Register against Bounds	PEA	Push Effective Address
CHK2	Check Register against Upper and	RESET	Reset External Devices
	Lower Bounds	ROL, ROR	Rotate Left and Right
CLR	Clear Operand	ROXL, ROXR	Rotate with Extend Left and Right
CMP	Compare	RTD	Return and Deallocate
CMPA	Compare Address	RTE	Return from Exception
CMPI	Compare Immediate	RTR	Return and Restore
CMPM	Compare Memory	RTS	Return from Subroutine
CMP2	Compare Register against Upper	SBCD	Subtract Decimal with Extend
	and Lower Bounds	Scc	Set Conditionally
DBcc	Test Condition, Decrement and	STOP	Stop
	Branch (16 Tests)	SUB	Subtract
DIVS, DIVSL	Signed Divide	SUBA	Subtract Address
DIVU, DIVUL	Unsigned Divide	SUBI	Subtract Immediate
EOR	Logical Exclusive OR	SUBQ	Subtract Quick
EORI	Logical Exclusive OR Immediate	SUBX	Subtract with Extend
EXG	Exchange Registers	SWAP	Swap Data Register Halves
EXT, EXTB	Sign Extend	TAS	Test and Set Operand
ILLEGAL	Take Illegal Instruction Trap	TBLS, TBLSN	Table Lookup and Interpolate,
JMP	Jump		Signed
JSR	Jump to Subroutine	TBLU, TBLUN	Table Lookup and Interpolate,
LEA	Load Effective Address		Unsigned
LINK	Link and Allocate	TRAPcc	Trap Conditionally (16 Tests)
LPSTOP	Low-Power Stop	TRAPV	Trap on Overflow
LSL, LSR	Logical Shift Left and Right	TST	Test
MOVE	Move	UNLK	Unlink

5- 6MC68340 USER’S MANUALMOTOROLA

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MC68340 specifications

The Motorola MC68340 is a highly integrated microprocessor that was introduced in the early 1990s. It belongs to the 68000 family of microprocessors and is designed to cater to the demands of embedded systems, particularly in telecommunications and networking applications. This chip represents a significant evolution in microprocessor technology by combining a microprocessor core with additional peripherals on a single chip, making it an attractive solution for engineers looking to design compact and efficient systems.

One of the key features of the MC68340 is its 32-bit architecture, which allows for significant processing power and data handling capabilities. This architecture enables the processor to handle larger data sizes and perform more complex calculations compared to its 16-bit predecessors. The MC68340 operates at clock speeds typically ranging from 16 MHz to 25 MHz. Its dual instruction pipeline enhances throughput, allowing for simultaneous instruction fetches and executions, which significantly boosts performance.

A notable characteristic of the MC68340 is the inclusion of integrated peripherals, which help reduce the overall component count in a system. Key integrated components include a memory management unit (MMU), a direct memory access (DMA) controller, and various communication interfaces such as serial ports. The memory management capabilities enhance the processor's ability to manage memory resources efficiently, enabling it to support multitasking environments commonly found in modern computing.

In terms of connectivity, the MC68340 features connections for both synchronous and asynchronous serial communication, making it well-suited for networking tasks. The processor supports a range of bus standards, including address and data buses, which facilitate seamless interaction with peripheral devices.

Another important aspect of the MC68340 is its flexibility. The processor supports multiple operating modes, including multiple CPU configurations and compatibility with the Motorola 68000 family, allowing for easier integration into existing systems.

Moreover, the MC68340 boasts low power consumption compared to many of its contemporaries, making it an excellent choice for battery-operated applications, enhancing its appeal in sectors like telecommunications, industrial control, and automotive systems. Its combination of performance, integration, versatility, and efficiency has secured the MC68340 a reputable position in the annals of embedded systems technology, proving to be a valuable asset for developers and engineers alike.

Motorola MC68340 manual Instruction Set, Mnemonic Description

Models: MC68340

Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

Table 5-1. Instruction Set

Mnemonic

Description

SBCD

5- 6MC68340 USER’S MANUALMOTOROLA

MC68340 specifications