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place in one bus cycle, where only the memory is explicitly addressed. The DMA bus cycle may be either a read or a write cycle. The DMA provides the address and control signals required for the operation. The requesting device either sends or receives data to or from the specified address. Only external requests can be used to start a transfer when the single-address mode is selected. An external device uses DREQ≈ to request a transfer.

Each DMA channel can be independently programmed to provide single-address transfers. The CCR ECO bit controls whether a source read or a destination write cycle occurs on the data bus. If the ECO bit is set, the external handshake signals are used with the source operand and a single-address source read occurs. If the ECO bit is cleared, the external handshake signals are used with the destination operand, and a single- address destination write occurs. The channel can be programmed to operate in either burst transfer mode or cycle steal mode. See 6.7 Register Description for more information.

If external 32-bit devices and a 32-bit bus are used with the MC68340, the DMA can control 32-bit transfers between devices that use the 32-bit bus in single-address mode only. External logic is required to complete a 32-bit (long-word) transfer. If both byte and word devices are used on an external bus, then an external multiplexer must be used to correctly transfer data. The SIZx and A0 signals can be used to control this external multiplexer.

6.4.1.1SINGLE-ADDRESS READ. During the single-address source (read) cycle, the DMA controls the transfer of data from memory to a device. The memory selected by the address specified in the source address register (SAR), the source function codes in the function code register (FCR), and the source size in the CCR provides the data and

control signals on the data bus. This bus cycle operates like a normal read bus cycle. The DMA control signals (DACK≈ and DONE≈) are asserted in the source (read) cycle. See Figures 6-5 and 6-6 for timing diagrams single-address read for external burst and cycle steal modes.

MOTOROLAMC68340 USER’S MANUAL6- 7

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MC68340 specifications

The Motorola MC68340 is a highly integrated microprocessor that was introduced in the early 1990s. It belongs to the 68000 family of microprocessors and is designed to cater to the demands of embedded systems, particularly in telecommunications and networking applications. This chip represents a significant evolution in microprocessor technology by combining a microprocessor core with additional peripherals on a single chip, making it an attractive solution for engineers looking to design compact and efficient systems.

One of the key features of the MC68340 is its 32-bit architecture, which allows for significant processing power and data handling capabilities. This architecture enables the processor to handle larger data sizes and perform more complex calculations compared to its 16-bit predecessors. The MC68340 operates at clock speeds typically ranging from 16 MHz to 25 MHz. Its dual instruction pipeline enhances throughput, allowing for simultaneous instruction fetches and executions, which significantly boosts performance.

A notable characteristic of the MC68340 is the inclusion of integrated peripherals, which help reduce the overall component count in a system. Key integrated components include a memory management unit (MMU), a direct memory access (DMA) controller, and various communication interfaces such as serial ports. The memory management capabilities enhance the processor's ability to manage memory resources efficiently, enabling it to support multitasking environments commonly found in modern computing.

In terms of connectivity, the MC68340 features connections for both synchronous and asynchronous serial communication, making it well-suited for networking tasks. The processor supports a range of bus standards, including address and data buses, which facilitate seamless interaction with peripheral devices.

Another important aspect of the MC68340 is its flexibility. The processor supports multiple operating modes, including multiple CPU configurations and compatibility with the Motorola 68000 family, allowing for easier integration into existing systems.

Moreover, the MC68340 boasts low power consumption compared to many of its contemporaries, making it an excellent choice for battery-operated applications, enhancing its appeal in sectors like telecommunications, industrial control, and automotive systems. Its combination of performance, integration, versatility, and efficiency has secured the MC68340 a reputable position in the annals of embedded systems technology, proving to be a valuable asset for developers and engineers alike.

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Models: MC68340

Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

MC68340 specifications