Epson S1D13705 technical manual Introduction, Features

Epson Research and Development	Page 7
Vancouver Design Center

1 Introduction

This manual describes the setup and operation of the S5U13705B00C Rev. 1.0 Evaluation Board. Implemented using the S1D13705 Embedded Memory Color LCD Controller, the S5U13705B00C board is designed for the 16-bit ISA bus environment. To accommodate other bus architectures, the S5U13705B00C board also provides CPU/Bus interface connectors.

For more information regarding the S1D13705, refer to the S1D13705 Hardware

Functional Specification, document number X27A-A-001-xx.

1.1 Features

•80-pin QFP14 package.

•SMT technology for all appropriate devices.

•4/8-bit monochrome and color passive LCD panel support.

•9/12-bit LCD TFT/D-TFD panel support.

•Selectable 3.3V or 5V LCD panel support.

•Oscillator support for CLKI (up to 50MHz with internal clock divider or 25MHz with no internal clock divider).

•Embedded 80K byte SRAM display buffer for 1/2/4 bit-per-pixel (bpp), 2/4/16-level gray shade display and 1/2/4/8 bpp, 2/4/16/256 level color display.

•Support for software and hardware power save modes.

•On-board adjustable LCD bias positive power supply (+23V to +40V).

•On-board adjustable LCD bias negative power supply (-23V to -14V).

•16-bit ISA bus support.

•CPU/Bus interface header strips for non-ISA bus support.

S5U13705B00C Rev. 1.0 ISA Bus Evaluation Board User Manual	S1D13705
Issue Date: 01/02/13	X27A-G-005-03