Page 82

Epson Research and Development

 

Vancouver Design Center

 

 

/*

**=========================================================================== ** HAL_REGS.H **---------------------------------------------------------------------------

**Created 1998, Epson Research & Development

**

Vancouver Design Center.

**Copyright(c) Seiko Epson Corp. 1998. All rights reserved. **=========================================================================== */

#ifndef __HAL_REGS_H__ #define __HAL_REGS_H__ /*

**13705 register names

*/

 

#define REG_REVISION_CODE

0x00

#define REG_MODE_REGISTER_0

0x01

#define REG_MODE_REGISTER_1

0x02

#define REG_MODE_REGISTER_2

0x03

#define REG_HORZ_PANEL_SIZE

0x04

#define REG_VERT_PANEL_SIZE_LSB

0x05

#define REG_VERT_PANEL_SIZE_MSB

0x06

#define REG_FPLINE_START_POS

0x07

#define REG_HORZ_NONDISP_PERIOD

0x08

#define REG_FPFRAME_START_POS

0x09

#define REG_VERT_NONDISP_PERIOD

0x0A

#define REG_MOD_RATE

0x0B

#define REG_SCRN1_START_ADDR_LSB

0x0C

#define REG_SCRN1_START_ADDR_MSB

0x0D

#define REG_SCRN2_START_ADDR_LSB

0x0E

#define REG_SCRN2_START_ADDR_MSB

0x0F

#define REG_SCRN_START_ADDR_OVERFLOW

0x10

#define REG_MEMORY_ADDR_OFFSET

0x11

#define REG_SCRN1_VERT_SIZE_LSB

0x12

#define REG_SCRN1_VERT_SIZE_MSB

0x13

#define REG_LUT_ADDR

0x15

#define REG_LUT_BANK_SELECT

0x16

#define REG_LUT_DATA

0x17

#define REG_GPIO_CONFIG

0x18

#define REG_GPIO_STATUS

0x19

#define REG_SCRATCHPAD

0x1A

#define REG_PORTRAIT_MODE

0x1B

#define REG_LINE_BYTE_COUNT

0x1C

#define REG_NOT_PRESENT_1

0x1D

/*

 

**WARNING!!! MAX_REG must be the last available register!!!

*/

#define MAX_REG

0x1D

#endif

/*

__HAL_REGS_H__ */

S1D13705

Programming Notes and Examples

X27A-G-002-03

Issue Date: 02/01/22

Page 176
Image 176
Epson S1D13705 technical manual Vancouver Design Center