Epson S1D13705 2 Initialization

Page 8 Epson Research and Development
Vancouver Design Center
S1D13705 Programming Notes and Examples
X27A-G-002-03 Issue Date: 02/01/22
2 Initialization
Prior to doing anything else with the S1D13705 the controller must be initialized. Initial-
ization is the process of setting up the control register s to a known state in o rder to gen erate
proper display signals.
2.1 Display Buffer Location
Before we can perform the initialization we have to know where to find the S1D13705
display memory and control registers.
The S1D13705 contains 80 kilobytes of internal display memory. External support logic
must be employed to decode the starting address for this display memory in CPU address
space. On the S5U13705B00x PC platform evaluation boards the address is usually fixed
at F00000h. Alternatively the address can be set to D0000h.
The control registers are located by adding 1FFE0h (128 Kb less 32 bytes) to the base
memory address. Thus, on the typical PC platform, we access control register 0 at a ddr ess
F1FFE0h. Control register 5 would be located at address F1FFE5, etc.
2.2 Register Values
This section describes the register settings and sequence of setting t he register s. In addit ion
to these setting the Look-Up Table must be programmed with appropriate colo rs. Look-Up
Table setup is not covered here. See Section 4 on page 15 of this manual for Look-Up Table
programming details.
The following initialization, presented in table form, shows the sequences and values to set
the registers. The notes column commen ts the reason for the particular value b eing written.
This example writes to all the necessary registers. Initially, when the S1 D13705 is powere d
up, all registers, unless noted otherwise in the specification, are set to zero. This example
programs these registers to zero to establish a known state. In practice, it may be possible
to write to only a subset of the registers.
The example initializes a S1D13705 to control a panel with the following specifications:
• 320x240 color single passive LCD panel at 70Hz.
• Color Format 2, 8-bit data interface.
• 8 bit-per-pixel (256 colors).
• 6 MHz input clock (CLKI).