Epson Research and Development

Page 5

Vancouver Design Center

 

 

 

 

 

List of Tables

 

Table 2-1:

Host Bus Interface Pin Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 2-2:

Summary of Power-On/Reset Options

14

Table 2-3:

Host Bus Interface Selection

14

Table 3-1:

Host Bus Interface Pin Mapping

16

Table 3-2:

Summary of Power-On/Reset Options

19

Table 3-3:

Host Bus Interface Selection

19

Table 4-1:

Host Bus Interface Pin Mapping

21

Table 4-2:

Summary of Power-On/Reset Options

26

Table 4-3:

Host Bus Interface Selection

26

List of Figures

Figure 2-1:

Typical Implementation of MC68328 to S1D13705 Interface - MC68K #1

. 12

Figure 2-2:

Typical Implementation of MC68328 to S1D13705 Interface - Generic #1

. 13

Figure 3-1:

Typical Implementation of MC68EZ328 to S1D13705 Interface - Generic #1

. 18

Figure 4-1:

Typical Implementation of MC68VZ328 to S1D13705 Interface - MC68K #1

. 24

Figure 4-2:

Typical Implementation of MC68VZ328 to S1D13705 Interface - Generic #1

. 25

Interfacing to the Motorola ‘Dragonball’ Family of Microprocessors

S1D13705

Issue Date: 01/02/13

X27A-G-007-04

Page 391
Image 391
Epson S1D13705 technical manual List of Tables