Epson technical manual S1D13705 Host Bus Interface

Epson Research and Development	Page 23
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4.3 S1D13705 Host Bus Interface

This section is a summary of the host bus interface modes available on the S1D13705 that may be used to interface to the MC68VZ328.

The S1D13705 implements a 16-bit interface to the host microprocessor which may operate in one of several modes compatible with most of the popular embedded microprocessor families. The two interface modes that may be used for the MC68VZ328 are:

•Motorola MC68K #1 (using Upper Data Strobe / Lower Data Strobe).

•Generic #1 (Chip Select, plus individual Read Enable/Write Enable for each byte).

4.3.1Host Bus Pin Connection

The following table shows the functions of each host bus interface signal.

Table 4-1: Host Bus Interface Pin Mapping

S1D13705	MC68K #1				Generic #1
Pin Names
AB[15:1]		A[15:1]			A[15:1]
AB0					A0
			LDS
DB[15:0]		D[15:0]			D[15:0]
WE1#					WE1#
			UDS
CS#	External Decode				External Decode
BCLK			CLK		BCLK
BS#					connect to VSS
				AS
RD/WR#					RD1#
			R/W
RD#	connect to IO VDD				RD0#
WE0#	connect to IO VDD				WE0#
WAIT#					WAIT#
		DTACK
RESET#	RESET#				RESET#

For details on configuration, refer to the S1D13705 Hardware Functional Specification, document number X27A-A-001-xx.

Interfacing to the Motorola ‘Dragonball’ Family of Microprocessors	S1D13705
Issue Date: 01/02/13	X27A-G-007-04